Tao Yuhong cb75de2163 HV: vpci: refine vbar sizing ... For a pci BAR, its size aligned bits have fixed to 0(except the memory type bits, they have another fixed value), they are read-only. When write ~0U to BAR for sizing, (type_bits | size_mask) is written into BAR. So do not need to distinguish between sizing vBAR and programming vBAR. When write a value to vBAR, always store (value & size_mask | type_bit) to vfcg. pci_vdev_read_vbar() is unnecessary, because it is only need to read vcfg. Tracked-On: #6011 Signed-off-by: Tao Yuhong <yuhong.tao@intel.com> Reviewed-by: Eddie Dong <eddie.dong@intel.com> Reviewed-by: Li Fei <fei1.li@intel.com>		2021-06-08 08:39:01 +08:00
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vpci	HV: vpci: refine vbar sizing	2021-06-08 08:39:01 +08:00
io_req.c	hv: mod: do not use explicit arch name when including headers	2021-05-08 11:15:46 +08:00
mmio_dev.c	hv: mod: do not use explicit arch name when including headers	2021-05-08 11:15:46 +08:00
vgpio.c	hv: paging: rename ppt_set/clear_ATTR to set_paging_ATTR	2021-05-14 09:18:00 +08:00
vioapic.c	hv: mod: do not use explicit arch name when including headers	2021-05-08 11:15:46 +08:00
vpic.c	hv: mod: do not use explicit arch name when including headers	2021-05-08 11:15:46 +08:00
vrtc.c	hv: mod: do not use explicit arch name when including headers	2021-05-08 11:15:46 +08:00
vuart.c	hv: mod: do not use explicit arch name when including headers	2021-05-08 11:15:46 +08:00