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cf524e684d
IF CAT is supported, and we want setup initial values to IA32_Type_MASK_n MSRs, We can define a global structure platform_clos_array[PLATFORM_CLOS_NUM], it has 2 members: 1.msr_index, the MSR address of IA32_Type_MASK_n 2.clos_masky, the initial valuses Global varible platform_clos_num is the number of IA32_Type_MASK_n, from IA32_Type_MASK_0 to IA32_Type_MASK_<CLOS_MAX_NUM - 1> Tracked-On: #2462 Signed-off-by: Tao Yuhong <yuhong.tao@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com> |
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| .. | ||
| apl-mrb | ||
| apl-up2 | ||
| dnv-cb2 | ||
| nuc6cayh | ||
| nuc7i7bnh | ||
| apl-mrb.config | ||
| apl-nuc | ||
| apl-nuc.config | ||
| apl-up2.config | ||
| dnv-cb2.config | ||
| kbl-nuc-i7 | ||
| kbl-nuc-i7.config | ||
| nuc6cayh.config | ||
| nuc7i7bnh.config | ||
| partition_config.c | ||
| sharing_config.c | ||
| sos_vm.h | ||