Haicheng Li cf5860f369 risc-v: handle timer interrupt ...

This patch addes the codes to handle timer interrupt.

Tracked-On: #8792
Signed-off-by: Haicheng Li <haicheng.li@intel.com>
Co-developed-by: Yi Y Sun <yi.y.sun@intel.com>
Signed-off-by: Yi Y Sun <yi.y.sun@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>

2025-09-17 08:55:12 +08:00

..

riscv

risc-v: handle timer interrupt

2025-09-17 08:55:12 +08:00

x86

hv: timer: rename functions to follow naming convention

2025-09-17 08:55:12 +08:00