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https://github.com/projectacrn/acrn-hypervisor.git
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cf5860f369
This patch addes the codes to handle timer interrupt. Tracked-On: #8792 Signed-off-by: Haicheng Li <haicheng.li@intel.com> Co-developed-by: Yi Y Sun <yi.y.sun@intel.com> Signed-off-by: Yi Y Sun <yi.y.sun@intel.com> Acked-by: Wang, Yu1 <yu1.wang@intel.com>
56 lines
1.2 KiB
C
56 lines
1.2 KiB
C
/*
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* Copyright (C) 2023-2024 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Authors:
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* Haicheng Li <haicheng.li@intel.com>
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*/
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#include <softirq.h>
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#include <asm/timer.h>
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#include "trap.h"
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#define MAX_IRQ_HANDLER 6
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/*
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* FIXME:
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* This logic need to be refined once irq multi-arch framework refine work
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* is done. Exception code 1(IPI), 5(timer) and 9(ext int) will be merged
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* into irq num namespace together, and keep a same entry in the exception
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* code table. Abstract PLIC/AIA as a irqchip that implement a get_irq API
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* to do the mapping between irq_num and PLIC source id or AIA's MSI.
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*/
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void sexpt_handler(void)
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{
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/* TODO: add early_printk here to announce Panic */
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while(1) {};
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}
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static void stimer_handler(void)
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{
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timer_irq_handler();
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}
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/* The irq handler array is not complete. So far, only timer handler is added. */
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static irq_handler_t sirq_handler[] = {
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sexpt_handler,
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sexpt_handler,
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sexpt_handler,
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sexpt_handler,
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sexpt_handler,
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stimer_handler,
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sexpt_handler,
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};
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void sint_handler(int irq)
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{
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if (irq < MAX_IRQ_HANDLER) {
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sirq_handler[irq]();
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} else {
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sirq_handler[MAX_IRQ_HANDLER]();
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}
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do_softirq();
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}
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