acrn-hypervisor/hypervisor
Xiangyang Wu d3b9712438 HV:INSTR:Rearrange register names in the enum cpu_reg_name
In the current "enum cpu_reg_name", there are 16-bit segment
register names, 16-bit descriptor table register names, and
16-bit task register names. These 16-bit register names are
defined among the 64 bit register names. To access these
16-bit fields in VMCS and 32 bit fields in VMCS, more
condition statements need to be used.

Update 16-bit register names position to simplify conditions
in vm_get_register and vm_set_register since different
fields size accessing in VMCS by different vmread/vmwrite
opreation.

Note: After checking the current implementation, the register names of
the same kind of registers (general registers, control registers,
segment registers etc) need to be defined in order, some code checks
the range by using this order. But different kinds of register
names as group, this group position can be adjusted to simplify
conditions.
The follwoing register names group need to be considered in current
implemetation:
(1) General register names group: CPU_REG_RAX~CPU_REG_RDI;
(2) Non-General register names group:CPU_REG_CR0~CPU_REG_LAST;
(3) segment register names group:CPU_REG_ES~CPU_REG_GS.

V1-->V2:
	This is new part of this patch serial created in
	V2 to rearrange register names as needed.
V2--V3:
	Update comment information.
V3-->V4:
	Define CPU_REG_NATURAL_LAST and CPU_REG_64BIT_LAST to
	make condition more understandable.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-07-18 12:31:42 +08:00
..
arch/x86 HV:INSTR:Rearrange register names in the enum cpu_reg_name 2018-07-18 12:31:42 +08:00
boot hv: change several APIs to void type 2018-07-18 12:30:37 +08:00
bsp update kernel-pk version to align with ACNR v0.1 2018-07-17 11:53:15 +08:00
common HV:common:fix "integer type violations" 2018-07-18 12:31:14 +08:00
debug HV: Fix new MISRAC violations for brackets 2018-07-16 11:02:38 +08:00
include HV:common:fix "integer type violations" 2018-07-18 12:31:14 +08:00
lib hv: sprintf: fix 'Declaration does not specify an array' 2018-07-16 15:48:18 +08:00
scripts/kconfig HV: make: rename minimalconfig to savedefconfig 2018-06-15 15:50:09 +08:00
Kconfig HV: config: add Kconfig and defconfigs for sbl & uefi 2018-06-08 17:21:13 +08:00
MAINTAINERS update home page information 2018-05-15 17:19:39 +08:00
Makefile HV:common:fix "integer type violations" 2018-07-18 12:31:14 +08:00
README.rst initial import 2018-05-11 14:44:28 +08:00

Embedded-Hypervisor
###################

This open source embedded hypervisor defines a software architecture for
running multiple software subsystems managed securely on a consolidated
system (by means of a virtual machine manager), and defines a reference
framework Device Model implementation for devices emulation

This embedded hypervisor is type-1 reference hypervisor, running
directly on the system hardware. It can be used for building software
defined cockpit (SDC) or In-Vehicle Experience (IVE) solutions running
on Intel Architecture Apollo Lake platforms. As a reference
implementation, it provides the basis for embedded hypervisor vendors to
build solutions with an open source reference I/O mediation solution,
and provides auto makers a reference software stack for SDC usage.

This embedded hypervisor is able to support both Linux* and Android* as
a Guest OS, managed by the hypervisor, where applications can run.

This embedded hypervisor is a partitioning hypervisor reference stack,
also suitable for non-automotive IoT & embedded device solutions. It
will be addressing the gap that currently exists between datacenter
hypervisors, hard partitioning hypervisors, and select industrial
applications.  Extending the scope of this open source embedded
hypervisor relies on the involvement of community developers like you!