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https://github.com/projectacrn/acrn-hypervisor.git
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348e2ba168
All the platforms supported by ACRN supports x2APIC. So enabled x2APIC for ACRN hv. Removed any code that is needed for xAPIC mode of operation. Tracked-On: #1455 Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com> Reviewed-by: Eddie Dong <eddie.dong@intel.com> Reviewed by: Yonghua Huang <yonghua.huang@intel.com>
74 lines
2.3 KiB
C
74 lines
2.3 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef INTR_LAPIC_H
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#define INTR_LAPIC_H
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/* intr_lapic_icr_delivery_mode */
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#define INTR_LAPIC_ICR_FIXED 0x0U
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#define INTR_LAPIC_ICR_LP 0x1U
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#define INTR_LAPIC_ICR_SMI 0x2U
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#define INTR_LAPIC_ICR_NMI 0x4U
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#define INTR_LAPIC_ICR_INIT 0x5U
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#define INTR_LAPIC_ICR_STARTUP 0x6U
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/* intr_lapic_icr_dest_mode */
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#define INTR_LAPIC_ICR_PHYSICAL 0x0U
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#define INTR_LAPIC_ICR_LOGICAL 0x1U
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/* intr_lapic_icr_level */
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#define INTR_LAPIC_ICR_DEASSERT 0x0U
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#define INTR_LAPIC_ICR_ASSERT 0x1U
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/* intr_lapic_icr_trigger */
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#define INTR_LAPIC_ICR_EDGE 0x0U
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#define INTR_LAPIC_ICR_LEVEL 0x1U
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/* intr_lapic_icr_shorthand */
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#define INTR_LAPIC_ICR_USE_DEST_ARRAY 0x0U
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#define INTR_LAPIC_ICR_SELF 0x1U
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#define INTR_LAPIC_ICR_ALL_INC_SELF 0x2U
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#define INTR_LAPIC_ICR_ALL_EX_SELF 0x3U
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/* Default LAPIC base */
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#define LAPIC_BASE 0xFEE00000U
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/* LAPIC register bit and bitmask definitions */
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#define LAPIC_SVR_VECTOR 0x000000FFU
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#define LAPIC_SVR_APIC_ENABLE_MASK 0x00000100U
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#define LAPIC_LVT_MASK 0x00010000U
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#define LAPIC_DELIVERY_MODE_EXTINT_MASK 0x00000700U
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/* LAPIC Timer bit and bitmask definitions */
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#define LAPIC_TMR_ONESHOT ((uint32_t) 0x0U << 17U)
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#define LAPIC_TMR_PERIODIC ((uint32_t) 0x1U << 17U)
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#define LAPIC_TMR_TSC_DEADLINE ((uint32_t) 0x2U << 17U)
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enum intr_cpu_startup_shorthand {
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INTR_CPU_STARTUP_USE_DEST,
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INTR_CPU_STARTUP_ALL_EX_SELF,
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INTR_CPU_STARTUP_UNKNOWN,
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};
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void save_lapic(struct lapic_regs *regs);
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void early_init_lapic(void);
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void init_lapic(void);
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void send_lapic_eoi(void);
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uint32_t get_cur_lapic_id(void);
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void send_startup_ipi(enum intr_cpu_startup_shorthand cpu_startup_shorthand,
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uint16_t dest_pcpu_id,
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uint64_t cpu_startup_start_address);
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/* API to send an IPI to multiple pCPUs*/
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void send_dest_ipi_mask(uint32_t dest_mask, uint32_t vector);
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/* API to send an IPI to a single pCPU */
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void send_single_ipi(uint16_t pcpu_id, uint32_t vector);
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void suspend_lapic(void);
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void resume_lapic(void);
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#endif /* INTR_LAPIC_H */
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