mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-09-28 20:16:09 +00:00
bb2118d98b
to enable early print output by pci uart, which has mmio address above 4G, add the early pagetable map for the MMIO range. we make an assumption that only map it with 2MB page, since platform with 39bit memory width have no 1G huge page feature and we cannot get the capacity at runtime, since it is a very early code stage. v2->v1: 1. add hva2hpa_early 2. add process when *pdpte is not present Signed-off-by: hangliu1 <hang1.liu@linux.intel.com> Reviewed-by: fei1.li <fei1.li@intel.com> Tracked-On: #6690
ACRN Hypervisor ############### The open source `Project ACRN`_ defines a device hypervisor reference stack and an architecture for running multiple software subsystems, managed securely, on a consolidated system by means of a virtual machine manager. It also defines a reference framework implementation for virtual device emulation, called the "ACRN Device Model". The ACRN Hypervisor is a Type 1 reference hypervisor stack, running directly on the bare-metal hardware, and is suitable for a variety of IoT and embedded device solutions. The ACRN hypervisor addresses the gap that currently exists between datacenter hypervisors, and hard partitioning hypervisors. The ACRN hypervisor architecture partitions the system into different functional domains, with carefully selected guest OS sharing optimizations for IoT and embedded devices. You can find out more about Project ACRN on the `Project ACRN documentation`_ website. .. _`Project ACRN`: https://projectacrn.org .. _`ACRN Hypervisor`: https://github.com/projectacrn/acrn-hypervisor .. _`Project ACRN documentation`: https://projectacrn.github.io/