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b4a61abe45
Update the board defconfig to scenario config xmls, and user can configure it from webUI. Tracked-On: #4634 Signed-off-by: Wei Liu <weix.w.liu@intel.com> Acked-by: Victor Sun <victor.sun@intel.com> Acked-by: Terry Zou <terry.zou@intel.com>
189 lines
13 KiB
XML
189 lines
13 KiB
XML
<acrn-config board="apl-up2" scenario="sdc2">
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<hv>
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<DEBUG_OPTIONS desc="Debug options for ACRN hypervisor, only valid on debug version">
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<RELEASE desc="Release build. 'y' for Release, 'n' for Debug.">n</RELEASE>
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<SERIAL_CONSOLE desc="The serial device which is used for hypervisor debug, only valid on Debug version.">/dev/ttyS0</SERIAL_CONSOLE>
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<MEM_LOGLEVEL desc="Default loglevel in memory">5</MEM_LOGLEVEL>
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<NPK_LOGLEVEL desc="Default loglevel for the hypervisor NPK log">5</NPK_LOGLEVEL>
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<CONSOLE_LOGLEVEL desc="Default loglevel on the serial console">3</CONSOLE_LOGLEVEL>
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<LOG_DESTINATION desc="Bitmap of consoles where logs are printed.">7</LOG_DESTINATION>
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<LOG_BUF_SIZE desc="Capacity of logbuf for each physical cpu.">0x40000</LOG_BUF_SIZE>
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</DEBUG_OPTIONS>
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<FEATURES>
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<RELOC desc="Enable hypervisor relocation">y</RELOC>
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<SCHEDULER desc="The CPU scheduler to be used by the hypervisor.">SCHED_NOOP</SCHEDULER>
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<MULTIBOOT2 desc="Support boot ACRN from multiboot2 protocol.">y</MULTIBOOT2>
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<HYPERV_ENABLED desc="Enable Hyper-V enlightenment">y</HYPERV_ENABLED>
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<IOMMU_ENFORCE_SNP desc="IOMMU enforce snoop behavior of DMA operation.">n</IOMMU_ENFORCE_SNP>
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<ACPI_PARSE_ENABLED desc="Enable ACPI runtime parsing.">y</ACPI_PARSE_ENABLED>
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<L1D_VMENTRY_ENABLED desc="Enable L1 cache flush before VM entry.">n</L1D_VMENTRY_ENABLED>
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<MCE_ON_PSC_DISABLED desc="Force to disable software workaround for Machine Check Error on Page Size Change.">n</MCE_ON_PSC_DISABLED>
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</FEATURES>
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<MEMORY>
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<STACK_SIZE desc="Capacity of one stack, in bytes.">0x2000</STACK_SIZE>
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<HV_RAM_SIZE desc="Size of the RAM region used by the hypervisor">0x0b800000</HV_RAM_SIZE>
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<HV_RAM_START desc="2M-aligned Start physical address of the RAM region used by the hypervisor.">0x00400000</HV_RAM_START>
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<LOW_RAM_SIZE desc="Size of the low RAM region">0x00010000</LOW_RAM_SIZE>
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<UOS_RAM_SIZE desc="Size of the User OS (UOS) RAM.">0x200000000</UOS_RAM_SIZE>
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<SOS_RAM_SIZE desc="Size of the Service OS (SOS) RAM.">0x400000000</SOS_RAM_SIZE>
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<PLATFORM_RAM_SIZE desc="Size of the physical platform RAM">0x400000000</PLATFORM_RAM_SIZE>
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</MEMORY>
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<CAPACITIES desc="Capacity limits for static assigned data struct or maximum supported resouce">
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<IOMMU_BUS_NUM desc="Highest PCI bus ID used during IOMMU initialization.">0x100</IOMMU_BUS_NUM>
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<MAX_IR_ENTRIES desc="Maximum number of Interrupt Remapping Entries.">256</MAX_IR_ENTRIES>
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<MAX_IOAPIC_NUM desc="Maximum number of IO-APICs.">1</MAX_IOAPIC_NUM>
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<MAX_KATA_VM_NUM desc="Maximum number of Kata Containers in SOS.">0</MAX_KATA_VM_NUM>
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<MAX_PCI_DEV_NUM desc="Maximum number of PCI devices.">96</MAX_PCI_DEV_NUM>
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<MAX_IOAPIC_LINES desc="Maximum number of interrupt lines per IOAPIC.">120</MAX_IOAPIC_LINES>
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<MAX_PT_IRQ_ENTRIES desc="Maximum number of interrupt source for PT devices.">64</MAX_PT_IRQ_ENTRIES>
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<MAX_MSIX_TABLE_NUM desc="Maximum number of MSI-X tables per device.">16</MAX_MSIX_TABLE_NUM>
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<MAX_EMULATED_MMIO desc="Maximum number of emulated MMIO regions.">16</MAX_EMULATED_MMIO>
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</CAPACITIES>
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<MISC_CFG>
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<GPU_SBDF desc="Segment, Bus, Device, and function of the GPU.">0x00000010</GPU_SBDF>
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<UEFI_OS_LOADER_NAME desc="UEFI OS loader name.">\\EFI\\org.clearlinux\\bootloaderx64.efi</UEFI_OS_LOADER_NAME>
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</MISC_CFG>
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</hv>
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<vm id="0">
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<load_order desc="Specify the VM by its load order: PRE_LAUNCHED_VM, SOS_VM or POST_LAUNCHED_VM." readonly="true">SOS_VM</load_order>
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<name desc="Specify the VM name which will be shown in hypervisor console command: vm_list.">ACRN SOS VM</name>
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<uuid configurable="0" desc="vm uuid">dbbbd434-7a57-4216-a12c-2201f1ab0240</uuid>
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<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
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<guest_flag>0</guest_flag>
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</guest_flags>
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<clos configurable="0" desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
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<vcpu_clos>0</vcpu_clos>
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</clos>
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<severity desc="severity of the guest VM">SEVERITY_SOS</severity>
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<memory>
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<start_hpa configurable="0" desc="The start physical address in host for the VM">0</start_hpa>
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<size configurable="0" desc="The memory size in Bytes for the VM">CONFIG_SOS_RAM_SIZE</size>
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</memory>
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<os_config>
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<name desc="Specify the OS name of VM, currently it is not referenced by hypervisor code.">ACRN Service OS</name>
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<kern_type desc="Specify the kernel image type so that hypervisor could load it correctly. Currently support KERNEL_BZIMAGE and KERNEL_ZEPHYR.">KERNEL_BZIMAGE</kern_type>
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<kern_mod desc="The tag for kernel image which act as multiboot module, it must exactly match the module tag in GRUB multiboot cmdline.">Linux_bzImage</kern_mod>
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<ramdisk_mod desc="The tag for ramdisk image which act as multiboot module, it must exactly match the module tag in GRUB multiboot cmdline."></ramdisk_mod>
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<bootargs configurable="0" desc="Specify kernel boot arguments">SOS_VM_BOOTARGS</bootargs>
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</os_config>
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<vuart id="0">
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<type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
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<base desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address." readonly="true">SOS_COM1_BASE</base>
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<irq configurable="0" desc="vCOM1 irq">SOS_COM1_IRQ</irq>
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</vuart>
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<vuart id="1">
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<type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
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<base desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_COM_BASE</base>
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<irq configurable="0" desc="vCOM2 irq">SOS_COM2_IRQ</irq>
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<target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">1</target_vm_id>
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<target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">1</target_uart_id>
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</vuart>
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<pci_dev_num configurable="0" desc="pci devices number">SOS_EMULATED_PCI_DEV_NUM</pci_dev_num>
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<pci_devs configurable="0" desc="pci devices list">sos_pci_devs</pci_devs>
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<board_private>
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<rootfs desc="rootfs for Linux kernel">/dev/mmcblk0p3</rootfs>
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<bootargs desc="Specify kernel boot arguments">
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rw rootwait console=tty0 consoleblank=0 no_timer_check quiet loglevel=3
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i915.nuclear_pageflip=1 i915.avail_planes_per_pipe=0x01010F i915.domain_plane_owners=0x011111110000 i915.enable_gvt=1
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hvlog=2M@0x5de00000 memmap=0x600000$0x5da00000 ramoops.mem_address=0x5da00000 ramoops.mem_size=0x400000 ramoops.console_size=0x200000
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reboot_panic=p,w module_blacklist=dwc3_pci i915.enable_guc=0x02 cma=64M@0-
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</bootargs>
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</board_private>
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</vm>
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<vm id="1">
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<load_order desc="Specify the VM by its load order: PRE_LAUNCHED_VM, SOS_VM or POST_LAUNCHED_VM." readonly="true">POST_LAUNCHED_VM</load_order>
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<uuid configurable="0" desc="vm uuid">d2795438-25d6-11e8-864e-cb7a18b34643</uuid>
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<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
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<guest_flag>0</guest_flag>
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</guest_flags>
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<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
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<pcpu_id>1</pcpu_id>
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</vcpu_affinity>
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<clos configurable="0" desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
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<vcpu_clos>0</vcpu_clos>
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</clos>
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<severity desc="severity of the guest VM">SEVERITY_STANDARD_VM</severity>
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<epc_section desc="epc section">
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<base desc="SGX EPC section base, must be page aligned">0</base>
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<size desc="SGX EPC section size in Bytes, must be page aligned">0</size>
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</epc_section>
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<vuart id="0">
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<type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
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<base desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_COM_BASE</base>
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<irq configurable="0" desc="vCOM1 irq">COM1_IRQ</irq>
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</vuart>
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<vuart id="1">
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<type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
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<base desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_COM_BASE</base>
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<irq configurable="0" desc="vCOM2 irq">COM2_IRQ</irq>
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<target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">0</target_vm_id>
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<target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">1</target_uart_id>
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</vuart>
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</vm>
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<vm id="2">
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<load_order desc="Specify the VM by its load order: PRE_LAUNCHED_VM, SOS_VM or POST_LAUNCHED_VM." readonly="true">POST_LAUNCHED_VM</load_order>
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<uuid configurable="0" desc="vm uuid">615db82a-e189-4b4f-8dbb-d321343e4ab3</uuid>
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<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
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<guest_flag>0</guest_flag>
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</guest_flags>
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<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
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<pcpu_id>2</pcpu_id>
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</vcpu_affinity>
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<clos configurable="0" desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
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<vcpu_clos>0</vcpu_clos>
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</clos>
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<severity desc="severity of the guest VM">SEVERITY_STANDARD_VM</severity>
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<epc_section desc="epc section">
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<base desc="SGX EPC section base, must be page aligned">0</base>
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<size desc="SGX EPC section size in Bytes, must be page aligned">0</size>
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</epc_section>
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<vuart id="0">
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<type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
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<base desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_COM_BASE</base>
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<irq configurable="0" desc="vCOM1 irq">COM1_IRQ</irq>
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</vuart>
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<vuart id="1">
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<type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
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<base desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_COM_BASE</base>
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<irq configurable="0" desc="vCOM2 irq">COM2_IRQ</irq>
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<target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">0</target_vm_id>
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<target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">1</target_uart_id>
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</vuart>
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</vm>
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<vm id="3">
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<load_order desc="Specify the VM by its load order: PRE_LAUNCHED_VM, SOS_VM or POST_LAUNCHED_VM." readonly="true">POST_LAUNCHED_VM</load_order>
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<uuid configurable="0" desc="vm uuid">38158821-5208-4005-b72a-8a609e4190d0</uuid>
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<guest_flags desc="Select all applicable flags for the VM" multiselect="true">
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<guest_flag>0</guest_flag>
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</guest_flags>
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<vcpu_affinity desc="vCPU affinity map. Each vCPU will pin to the selected pCPU ID. Please make sure each vCPU pin to different pCPU.">
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<pcpu_id>3</pcpu_id>
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</vcpu_affinity>
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<clos configurable="0" desc="Class of Service for Cache Allocation Technology. Please refer SDM 17.19.2 for details and use with caution.">
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<vcpu_clos>0</vcpu_clos>
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</clos>
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<severity desc="severity of the guest VM">SEVERITY_STANDARD_VM</severity>
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<epc_section desc="epc section">
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<base desc="SGX EPC section base, must be page aligned">0</base>
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<size desc="SGX EPC section size in Bytes, must be page aligned">0</size>
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</epc_section>
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<vuart id="0">
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<type configurable="0" desc="vCOM1 type">VUART_LEGACY_PIO</type>
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<base desc="vUART0 (A.K.A COM1) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_COM_BASE</base>
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<irq configurable="0" desc="vCOM1 irq">COM1_IRQ</irq>
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</vuart>
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<vuart id="1">
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<type configurable="0" desc="vCOM2 type">VUART_LEGACY_PIO</type>
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<base desc="vUART1 (A.K.A COM2) enabling switch. Enable by exposing its base address, disable by returning invalid base address.">INVALID_COM_BASE</base>
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<irq configurable="0" desc="vCOM2 irq">COM2_IRQ</irq>
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<target_vm_id desc="COM2 is used for VM communications. When it is enabled, please specify which target VM that current VM connect to.">0</target_vm_id>
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<target_uart_id configurable="0" desc="target vUART ID that vCOM2 connect to">1</target_uart_id>
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</vuart>
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</vm>
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</acrn-config>
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