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a68f655a11
For a pre-launched VM, a region from PTDEV_HI_MMIO_START is used to store 64bit vBARs of PT devices which address is high than 4G. The region should be located after all user memory space and be coverd by guest EPT address. Tracked-On: #4458 Signed-off-by: Victor Sun <victor.sun@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
25 lines
680 B
C
25 lines
680 B
C
/*
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* Copyright (C) 2019 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PCI_DEVICES_H_
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#define PCI_DEVICES_H_
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#define PTDEV_HI_MMIO_SIZE 0UL
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#define SATA_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x12U, .f = 0x00U}, \
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.vbar_base[0] = 0xb3f10000UL, \
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.vbar_base[1] = 0xb3f53000UL, \
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.vbar_base[5] = 0xb3f52000UL
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#define USB_CONTROLLER_0 .pbdf.bits = {.b = 0x00U, .d = 0x15U, .f = 0x00U}, \
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.vbar_base[0] = 0xb3f00000UL
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#define ETHERNET_CONTROLLER_0 .pbdf.bits = {.b = 0x02U, .d = 0x00U, .f = 0x00U}, \
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.vbar_base[0] = 0xb3c00000UL, \
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.vbar_base[3] = 0xb3c80000UL
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#endif /* PCI_DEVICES_H_ */
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