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https://github.com/projectacrn/acrn-hypervisor.git
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dd43f3ba0a
replace CPU_PAGE_MASK with PAGE_MASK These two MACROs are duplicated and PAGE_MASK is a more reasonable name. Tracked-On: #861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
311 lines
8.6 KiB
C
311 lines
8.6 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/**
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* @file mmu.h
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*
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* @brief APIs for Memory Management module
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*/
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#ifndef MMU_H
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#define MMU_H
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/**
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* @brief Memory Management
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*
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* @defgroup acrn_mem ACRN Memory Management
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* @{
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*/
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/** The flag that indicates that the page fault was caused by a non present
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* page.
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*/
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#define PAGE_FAULT_P_FLAG 0x00000001U
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/** The flag that indicates that the page fault was caused by a write access. */
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#define PAGE_FAULT_WR_FLAG 0x00000002U
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/** The flag that indicates that the page fault was caused in user mode. */
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#define PAGE_FAULT_US_FLAG 0x00000004U
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/** The flag that indicates that the page fault was caused by a reserved bit
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* violation.
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*/
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#define PAGE_FAULT_RSVD_FLAG 0x00000008U
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/** The flag that indicates that the page fault was caused by an instruction
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* fetch.
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*/
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#define PAGE_FAULT_ID_FLAG 0x00000010U
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/* Defines used for common memory sizes */
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#define MEM_1K 1024U
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#define MEM_2K (MEM_1K * 2U)
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#define MEM_4K (MEM_1K * 4U)
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#define MEM_1M (MEM_1K * 1024U)
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#define MEM_2M (MEM_1M * 2U)
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#define MEM_1G (MEM_1M * 1024U)
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#ifndef ASSEMBLER
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#include <cpu.h>
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#include <page.h>
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/* Define cache line size (in bytes) */
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#define CACHE_LINE_SIZE 64U
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/* IA32E Paging constants */
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#define IA32E_REF_MASK \
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(boot_cpu_data.physical_address_mask)
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static inline uint64_t round_page_up(uint64_t addr)
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{
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return (((addr + (uint64_t)PAGE_SIZE) - 1UL) & PAGE_MASK);
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}
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static inline uint64_t round_page_down(uint64_t addr)
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{
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return (addr & PAGE_MASK);
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}
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/**
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* @brief Page tables level in IA32 paging mode
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*/
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enum _page_table_level {
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/**
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* @brief The PML4 level in the page tables
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*/
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IA32E_PML4 = 0,
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/**
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* @brief The Page-Directory-Pointer-Table level in the page tables
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*/
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IA32E_PDPT = 1,
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/**
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* @brief The Page-Directory level in the page tables
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*/
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IA32E_PD = 2,
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/**
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* @brief The Page-Table level in the page tables
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*/
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IA32E_PT = 3,
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};
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/* Page size */
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#define PAGE_SIZE_4K MEM_4K
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#define PAGE_SIZE_2M MEM_2M
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#define PAGE_SIZE_1G MEM_1G
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void sanitize_pte_entry(uint64_t *ptep);
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void sanitize_pte(uint64_t *pt_page);
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/**
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* @brief MMU paging enable
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*
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* @return None
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*/
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void enable_paging(void);
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/**
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* @brief Supervisor-mode execution prevention (SMEP) enable
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*
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* @return None
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*/
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void enable_smep(void);
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/**
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* @brief MMU page tables initialization
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*
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* @return None
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*/
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void init_paging(void);
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void mmu_add(uint64_t *pml4_page, uint64_t paddr_base, uint64_t vaddr_base,
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uint64_t size, uint64_t prot, const struct memory_ops *mem_ops);
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void mmu_modify_or_del(uint64_t *pml4_page, uint64_t vaddr_base, uint64_t size,
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uint64_t prot_set, uint64_t prot_clr, const struct memory_ops *mem_ops, uint32_t type);
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/**
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* @brief EPT and VPID capability checking
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*
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* @retval 0 on success
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* @retval -ENODEV Don't support EPT or VPID capability
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*/
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int check_vmx_mmu_cap(void);
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/**
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* @brief VPID allocation
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*
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* @retval 0 VPID overflow
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* @retval >0 the valid VPID
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*/
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uint16_t allocate_vpid(void);
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/**
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* @brief Specified signle VPID flush
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*
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* @param[in] vpid the specified VPID
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*
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* @return None
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*/
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void flush_vpid_single(uint16_t vpid);
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/**
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* @brief All VPID flush
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*
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* @return None
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*/
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void flush_vpid_global(void);
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/**
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* @brief Guest-physical mappings and combined mappings invalidation
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*
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* @param[in] vcpu the pointer that points the vcpu data structure
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*
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* @return None
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*/
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void invept(const struct acrn_vcpu *vcpu);
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/**
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*@pre (pml4_page != NULL) && (pg_size != NULL)
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*/
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uint64_t *lookup_address(uint64_t *pml4_page, uint64_t addr,
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uint64_t *pg_size, const struct memory_ops *mem_ops);
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#pragma pack(1)
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/** Defines a single entry in an E820 memory map. */
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struct e820_entry {
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/** The base address of the memory range. */
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uint64_t baseaddr;
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/** The length of the memory range. */
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uint64_t length;
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/** The type of memory region. */
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uint32_t type;
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};
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#pragma pack()
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/* E820 memory types */
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#define E820_TYPE_RAM 1U /* EFI 1, 2, 3, 4, 5, 6, 7 */
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#define E820_TYPE_RESERVED 2U
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/* EFI 0, 11, 12, 13 (everything not used elsewhere) */
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#define E820_TYPE_ACPI_RECLAIM 3U /* EFI 9 */
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#define E820_TYPE_ACPI_NVS 4U /* EFI 10 */
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#define E820_TYPE_UNUSABLE 5U /* EFI 8 */
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static inline void cache_flush_invalidate_all(void)
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{
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asm volatile (" wbinvd\n" : : : "memory");
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}
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static inline void clflush(volatile void *p)
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{
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asm volatile ("clflush (%0)" :: "r"(p));
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}
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/**
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* Invalid HPA is defined for error checking,
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* according to SDM vol.3A 4.1.4, the maximum
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* host physical address width is 52
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*/
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#define INVALID_HPA (0x1UL << 52U)
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#define INVALID_GPA (0x1UL << 52U)
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/* External Interfaces */
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/**
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* @brief EPT page tables destroy
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*
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* @param[inout] vm the pointer that points to VM data structure
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*
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* @return None
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*/
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void destroy_ept(struct acrn_vm *vm);
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/**
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* @brief Translating from guest-physical address to host-physcial address
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*
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* @param[in] vm the pointer that points to VM data structure
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* @param[in] gpa the specified guest-physical address
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*
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* @retval hpa the host physical address mapping to the \p gpa
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* @retval INVALID_HPA the HPA of parameter gpa is unmapping
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*/
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uint64_t gpa2hpa(struct acrn_vm *vm, uint64_t gpa);
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/**
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* @brief Translating from guest-physical address to host-physcial address
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*
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* @param[in] vm the pointer that points to VM data structure
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* @param[in] gpa the specified guest-physical address
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* @param[out] size the pointer that returns the page size of
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* the page in which the gpa is
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*
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* @retval hpa the host physical address mapping to the \p gpa
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* @retval INVALID_HPA the HPA of parameter gpa is unmapping
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*/
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uint64_t local_gpa2hpa(struct acrn_vm *vm, uint64_t gpa, uint32_t *size);
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/**
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* @brief Translating from host-physical address to guest-physical address for VM0
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*
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* @param[in] hpa the specified host-physical address
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*
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* @pre: the gpa and hpa are identical mapping in SOS.
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*/
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uint64_t vm0_hpa2gpa(uint64_t hpa);
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/**
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* @brief Guest-physical memory region mapping
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*
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* @param[in] vm the pointer that points to VM data structure
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* @param[in] pml4_page The physical address of The EPTP
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* @param[in] hpa The specified start host physical address of host
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* physical memory region that GPA will be mapped
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* @param[in] gpa The specified start guest physical address of guest
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* physical memory region that needs to be mapped
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* @param[in] size The size of guest physical memory region that needs
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* to be mapped
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* @param[in] prot_orig The specified memory access right and memory type
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*
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* @return None
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*/
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void ept_mr_add(struct acrn_vm *vm, uint64_t *pml4_page, uint64_t hpa,
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uint64_t gpa, uint64_t size, uint64_t prot_orig);
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/**
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* @brief Guest-physical memory page access right or memory type updating
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*
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* @param[in] vm the pointer that points to VM data structure
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* @param[in] pml4_page The physical address of The EPTP
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* @param[in] gpa The specified start guest physical address of guest
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* physical memory region whoes mapping needs to be updated
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* @param[in] size The size of guest physical memory region
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* @param[in] prot_set The specified memory access right and memory type
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* that will be set
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* @param[in] prot_clr The specified memory access right and memory type
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* that will be cleared
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*
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* @return None
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*/
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void ept_mr_modify(struct acrn_vm *vm, uint64_t *pml4_page, uint64_t gpa,
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uint64_t size, uint64_t prot_set, uint64_t prot_clr);
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/**
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* @brief Guest-physical memory region unmapping
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*
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* @param[in] vm the pointer that points to VM data structure
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* @param[in] pml4_page The physical address of The EPTP
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* @param[in] gpa The specified start guest physical address of guest
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* physical memory region whoes mapping needs to be deleted
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* @param[in] size The size of guest physical memory region
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*
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* @return None
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*
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* @pre [gpa,gpa+size) has been mapped into host physical memory region
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*/
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void ept_mr_del(struct acrn_vm *vm, uint64_t *pml4_page, uint64_t gpa,
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uint64_t size);
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/**
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* @brief EPT violation handling
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*
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* @param[in] vcpu the pointer that points to vcpu data structure
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*
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* @retval -EINVAL fail to handle the EPT violation
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* @retval 0 Success to handle the EPT violation
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*/
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int ept_violation_vmexit_handler(struct acrn_vcpu *vcpu);
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/**
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* @brief EPT misconfiguration handling
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*
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* @param[in] vcpu the pointer that points to vcpu data structure
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*
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* @retval -EINVAL fail to handle the EPT misconfig
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* @retval 0 Success to handle the EPT misconfig
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*/
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int ept_misconfig_vmexit_handler(__unused struct acrn_vcpu *vcpu);
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/**
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* @}
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*/
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#endif /* ASSEMBLER not defined */
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#endif /* MMU_H */
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