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This patch refine CLOS module by the following aspects: 1 Unified CACHE_ID type to Hex Format 2 Rewrite policy merge with RDT Class 3 Modify the logic of generate CPU mask Signed-off-by: Chenli Wei <chenli.wei@intel.com> |
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.. | ||
acpi_platform_h.py | ||
board_c.py | ||
board_cfg_gen.py | ||
board_info_h.py | ||
pci_devices_h.py | ||
README | ||
vbar_base_h.py |
Please run board_cfg_gen.py to generate board related configuration files. usage: python3 board_cfg_gen.py [h] --board <board_info_file> --scenario <scenario_info_file> positional arguments: board_info_file : file name of the board info XML scenario_info_file : file name of the scenario info XML