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ab4e19d0be
The current code would write 'BAR address & size_maks' into PCIe virtual BAR before updating the virtual BAR's base address when guest writing a PCIe device's BAR. If the size of a PCIe device's BAR is larger than 4G, the low 32 bits size_mask for this 64 bits BAR is zero. When ACRN updating the virtual BAR's base address, the low 32 bits sizing information would be lost. This patch saves whether a BAR writing is sizing or not before updating the virtual BAR's base address. Tracked-On: #8267 Signed-off-by: Fei Li <fei1.li@intel.com>
ACRN Hypervisor ############### The open source `Project ACRN`_ defines a device hypervisor reference stack and an architecture for running multiple software subsystems, managed securely, on a consolidated system by means of a virtual machine manager. It also defines a reference framework implementation for virtual device emulation, called the "ACRN Device Model". The ACRN Hypervisor is a Type 1 reference hypervisor stack, running directly on the bare-metal hardware, and is suitable for a variety of IoT and embedded device solutions. The ACRN hypervisor addresses the gap that currently exists between datacenter hypervisors, and hard partitioning hypervisors. The ACRN hypervisor architecture partitions the system into different functional domains, with carefully selected guest OS sharing optimizations for IoT and embedded devices. You can find out more about Project ACRN on the `Project ACRN documentation`_ website. .. _`Project ACRN`: https://projectacrn.org .. _`ACRN Hypervisor`: https://github.com/projectacrn/acrn-hypervisor .. _`Project ACRN documentation`: https://projectacrn.github.io/