acrn-hypervisor/hypervisor/dm
Shiqing Gao e8229879a6 hv: use MMIO read/write APIs to access MMIO registers
MMIO registers might be changed at any time.
The changes might not be catched due to compiler optimization
if there is no 'volatile' keyword.

We have defined MMIO read/write APIs to address the above issue.
'volatile' keyword is being used in these defined MMIO read/write
APIs.

This patch updates the MMIO registers access implementation in
'msix.c' to use these defined MMIO read/write APIs.

v1 -> v2:
 * update the algorithm to get the address of high 32-bit of
   'pentry->addr'
   - previous way:
           &(pentry->addr) + 4U
           ===> &(pentry->addr) + 4 * 64 bits
           since 'pentry->addr' is 64 bits
   - new way:
           (char *)&(pentry->addr) + 4U
           ===> &(pentry->addr) + 4 * 8 bits
           since 'char' is 8 bits

Tracked-On: #1711
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-11-05 09:50:28 +08:00
..
hw hv: Don't check multi-function flag in PCI enumeration 2018-11-01 21:22:10 +08:00
vpci hv: use MMIO read/write APIs to access MMIO registers 2018-11-05 09:50:28 +08:00
vioapic.c hv: revise interfaces description in vioapic 2018-11-03 08:40:14 -07:00
vpic.c hv: revise interfaces description in vpic 2018-11-03 08:40:14 -07:00
vrtc.c hv: merge hv_lib.h and hypervisor.h 2018-09-27 15:55:41 +08:00