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https://github.com/projectacrn/acrn-hypervisor.git
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977c4b20b5
MISRA C required that return value should be used, missing for it should add "(void)" prefix before the function call. Some function can be declared without return value to avoid this problem. Signed-off-by: Huihuang Shi <huihuang.shi@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
175 lines
4.4 KiB
C
175 lines
4.4 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef IRQ_H
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#define IRQ_H
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/* vectors for normal, usually for devices */
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#define VECTOR_FOR_NOR_LOWPRI_START 0x20
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#define VECTOR_FOR_NOR_LOWPRI_END 0x7F
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#define VECTOR_FOR_NOR_HIGHPRI_START 0x80
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#define VECTOR_FOR_NOR_HIGHPRI_END 0xDF
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#define VECTOR_FOR_NOR_END VECTOR_FOR_NOR_HIGHPRI_END
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#define VECTOR_FOR_INTR_START VECTOR_FOR_NOR_LOWPRI_START
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/* vectors for priority, usually for HV service */
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#define VECTOR_FOR_PRI_START 0xE0
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#define VECTOR_FOR_PRI_END 0xFF
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#define VECTOR_TIMER 0xEF
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#define VECTOR_NOTIFY_VCPU 0xF0
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#define VECTOR_VIRT_IRQ_VHM 0xF7
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#define VECTOR_SPURIOUS 0xFF
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#define NR_MAX_VECTOR 0xFF
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#define VECTOR_INVALID (NR_MAX_VECTOR + 1)
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#define NR_MAX_IRQS (256+16)
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#define IRQ_INVALID (NR_MAX_IRQS+1)
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#define DEFAULT_DEST_MODE IOAPIC_RTE_DESTLOG
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#define DEFAULT_DELIVERY_MODE IOAPIC_RTE_DELLOPRI
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#define ALL_CPUS_MASK ((1 << phy_cpu_num) - 1)
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struct irq_desc;
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enum irq_mode {
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IRQ_PULSE,
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IRQ_ASSERT,
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IRQ_DEASSERT,
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};
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enum irq_state {
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IRQ_NOT_ASSIGNED = 0,
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IRQ_ASSIGNED_SHARED,
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IRQ_ASSIGNED_NOSHARE,
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};
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enum irq_desc_state {
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IRQ_DESC_PENDING,
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IRQ_DESC_IN_PROCESS,
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};
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typedef int (*dev_handler_t)(int irq, void*);
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struct dev_handler_node {
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char name[32];
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void *dev_data;
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dev_handler_t dev_handler;
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struct dev_handler_node *next;
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struct irq_desc *desc;
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};
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struct irq_routing_entry {
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unsigned short bdf; /* BDF */
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int irq; /* PCI cfg offset 0x3C: IRQ pin */
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int intx; /* PCI cfg offset 0x3D: 0-3 = INTA,INTB,INTC,INTD*/
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};
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/*
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* Definition of the stack frame layout
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*/
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struct intr_excp_ctx {
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uint64_t r12;
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uint64_t r13;
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uint64_t r14;
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uint64_t r15;
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uint64_t rbx;
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uint64_t rbp;
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uint64_t rax;
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uint64_t rcx;
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uint64_t rdx;
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uint64_t rsi;
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uint64_t rdi;
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uint64_t r8;
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uint64_t r9;
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uint64_t r10;
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uint64_t r11;
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uint64_t vector;
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uint64_t error_code;
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uint64_t rip;
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uint64_t cs;
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uint64_t rflags;
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uint64_t rsp;
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uint64_t ss;
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};
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uint32_t irq_mark_used(uint32_t irq);
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uint32_t irq_alloc(void);
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uint32_t irq_desc_alloc_vector(uint32_t irq, bool lowpri);
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void irq_desc_try_free_vector(uint32_t irq);
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uint32_t irq_to_vector(uint32_t irq);
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uint32_t dev_to_irq(struct dev_handler_node *node);
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uint32_t dev_to_vector(struct dev_handler_node *node);
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int handle_level_interrupt_common(struct irq_desc *desc, void *handler_data);
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int common_handler_edge(struct irq_desc *desc, void *handler_data);
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int common_dev_handler_level(struct irq_desc *desc, void *handler_data);
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int quick_handler_nolock(struct irq_desc *desc, void *handler_data);
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typedef int (*irq_handler_t)(struct irq_desc*, void*);
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void update_irq_handler(uint32_t irq, irq_handler_t func);
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int init_default_irqs(unsigned int cpu);
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void dispatch_interrupt(struct intr_excp_ctx *ctx);
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struct dev_handler_node*
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pri_register_handler(uint32_t irq,
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uint32_t vector,
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dev_handler_t func,
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void *dev_data,
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const char *name);
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struct dev_handler_node*
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normal_register_handler(uint32_t irq,
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dev_handler_t func,
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void *dev_data,
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bool share,
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bool lowpri,
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const char *name);
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void unregister_handler_common(struct dev_handler_node *node);
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void get_cpu_interrupt_info(char *str, int str_max);
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void setup_notification(void);
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typedef void (*spurious_handler_t)(uint32_t vector);
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extern spurious_handler_t spurious_handler;
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/*
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* Some MSI message definitions
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*/
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#define MSI_ADDR_MASK 0xfff00000
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#define MSI_ADDR_BASE 0xfee00000
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#define MSI_ADDR_RH 0x00000008 /* Redirection Hint */
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#define MSI_ADDR_LOG 0x00000004 /* Destination Mode */
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/* RFLAGS */
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#define HV_ARCH_VCPU_RFLAGS_IF (1<<9)
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/* Interruptability State info */
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#define HV_ARCH_VCPU_BLOCKED_BY_MOVSS (1<<1)
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#define HV_ARCH_VCPU_BLOCKED_BY_STI (1<<0)
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void vcpu_inject_extint(struct vcpu *vcpu);
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void vcpu_inject_nmi(struct vcpu *vcpu);
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int vcpu_inject_gp(struct vcpu *vcpu, uint32_t err_code);
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int vcpu_inject_pf(struct vcpu *vcpu, uint64_t addr, uint32_t err_code);
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void vcpu_make_request(struct vcpu *vcpu, int eventid);
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int vcpu_queue_exception(struct vcpu *vcpu, uint32_t vector, uint32_t err_code);
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int exception_vmexit_handler(struct vcpu *vcpu);
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int interrupt_window_vmexit_handler(struct vcpu *vcpu);
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int external_interrupt_vmexit_handler(struct vcpu *vcpu);
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int acrn_handle_pending_request(struct vcpu *vcpu);
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int interrupt_init(uint32_t logical_id);
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void cancel_event_injection(struct vcpu *vcpu);
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#endif /* IRQ_H */
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