Li Fei1 e99ddf28c3 hv: vpci: handle the quirk part for pass through pci device cfg access in dm ... There're some PCI devices need special handler for vendor-specical feature or capability CFG access. The Intel GPU is one of them. In order to keep the ACRN-HV clean, we want to throw the qurik part of PCI CFG asccess to DM to handle. To achieve this, we implement per-device policy base on whether it needs quirk handler for a VM: each device could configure as "quirk pass through device" or not. For a "quirk pass through device", we will handle the general part in HV and the quirk part in DM. For a non "quirk pass through device", we will handle all the part in HV. Tracked-On: #4371 Signed-off-by: Li Fei1 <fei1.li@intel.com>		2020-03-20 10:08:43 +08:00
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pci_pt.c	hv: unmap SR-IOV VF MMIO when the VF physical device is disabled	2020-03-18 21:46:54 +08:00
vdev.c	hv: refine naming	2020-03-11 08:35:30 +08:00
vhostbridge.c	hv: vpci: add _v prefix for some function name	2020-03-09 17:09:55 +08:00
vmsi.c	hv: refine read/write configuration APIs for vmsi/vmsix	2020-03-12 10:40:02 +08:00
vmsix.c	hv: refine read/write configuration APIs for vmsi/vmsix	2020-03-12 10:40:02 +08:00
vpci_bridge.c	hv: vpci: add _v prefix for some function name	2020-03-09 17:09:55 +08:00
vpci_priv.h	hv: vpci: handle the quirk part for pass through pci device cfg access in dm	2020-03-20 10:08:43 +08:00
vpci.c	hv: vpci: handle the quirk part for pass through pci device cfg access in dm	2020-03-20 10:08:43 +08:00
vsriov.c	hv: unmap SR-IOV VF MMIO when the VF physical device is disabled	2020-03-18 21:46:54 +08:00