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ea0ba47b02
Guest may write a MSI capability register with only RW bits setting on. This works well on native since the hardware will make sure RO register bits could not over-write. However, the software needs more efforts to achieve this. This patch does this by defining a RW permission mapping base on bits. When a guest tries to write a MSI Capability register, only modify the RW bits on vCFG space. Tracked-On: #4550 Signed-off-by: Li Fei1 <fei1.li@intel.com> |
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| .. | ||
| acpi_parser | ||
| arch/x86 | ||
| boot | ||
| bsp/ld | ||
| common | ||
| debug | ||
| dm | ||
| hw | ||
| include | ||
| lib | ||
| pre_build | ||
| release | ||
| scenarios | ||
| scripts | ||
| Kconfig | ||
| MAINTAINERS | ||
| Makefile | ||
| README.rst | ||
ACRN Hypervisor ############### The open source `Project ACRN`_ defines a device hypervisor reference stack and an architecture for running multiple software subsystems, managed securely, on a consolidated system by means of a virtual machine manager. It also defines a reference framework implementation for virtual device emulation, called the "ACRN Device Model". The ACRN Hypervisor is a Type 1 reference hypervisor stack, running directly on the bare-metal hardware, and is suitable for a variety of IoT and embedded device solutions. The ACRN hypervisor addresses the gap that currently exists between datacenter hypervisors, and hard partitioning hypervisors. The ACRN hypervisor architecture partitions the system into different functional domains, with carefully selected guest OS sharing optimizations for IoT and embedded devices. You can find out more about Project ACRN on the `Project ACRN documentation`_ website. .. _`Project ACRN`: https://projectacrn.org .. _`ACRN Hypervisor`: https://github.com/projectacrn/acrn-hypervisor .. _`Project ACRN documentation`: https://projectacrn.github.io/