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https://github.com/projectacrn/acrn-hypervisor.git
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eae668268e
Service VM may write 0x6 to port 0xcf9 to trigger a warm reset, but current hypervisor always performs a cold reset by writing 0xE to CF9. Hypervisor should reboot the system in the same mode as Service VM specified. Specific OS features (like linux pstore) requires warm reset to keep data across reboot. The behavior of hv console's reboot command (cold reset) remains unchanged. Tracked-On: #8539 Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com> Reviewed-by: Junjie Mao <junjie.mao@intel.com>
49 lines
1.4 KiB
C
49 lines
1.4 KiB
C
/*
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* Copyright (C) 2018-2022 Intel Corporation.
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef HOST_PM_H
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#define HOST_PM_H
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#include <acrn_common.h>
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#define BIT_SLP_TYPx 10U
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#define BIT_SLP_EN 13U
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#define BIT_WAK_STS 15U
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#define CF9_RESET_WARM 0x6
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#define CF9_RESET_COLD 0xE
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struct cpu_state_info {
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uint8_t px_cnt; /* count of all Px states */
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const struct acrn_pstate_data *px_data;
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uint8_t cx_cnt; /* count of all Cx entries */
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const struct acrn_cstate_data *cx_data;
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};
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struct cpu_state_table {
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char model_name[64];
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struct cpu_state_info state_info;
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};
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struct acpi_reset_reg {
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struct acrn_acpi_generic_address reg;
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uint8_t val;
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};
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struct pm_s_state_data *get_host_sstate_data(void);
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void host_enter_s3(const struct pm_s_state_data *sstate_data, uint32_t pm1a_cnt_val, uint32_t pm1b_cnt_val);
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void shutdown_system(void);
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void save_s5_reg_val(uint32_t pm1a_cnt_val, uint32_t pm1b_cnt_val);
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void do_acpi_sx(const struct pm_s_state_data *sstate_data, uint32_t pm1a_cnt_val, uint32_t pm1b_cnt_val);
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extern void asm_enter_s3(const struct pm_s_state_data *sstate_data, uint32_t pm1a_cnt_val, uint32_t pm1b_cnt_val);
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extern void restore_s3_context(void);
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struct cpu_state_info *get_cpu_pm_state_info(void);
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struct acpi_reset_reg *get_host_reset_reg_data(void);
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void reset_host(bool warm);
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void init_frequency_policy(void);
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void apply_frequency_policy(void);
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#endif /* HOST_PM_H */
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