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https://github.com/projectacrn/acrn-hypervisor.git
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eb8c4fb0d5
MISRAC has requirement about implict conversion: actual to formal param. This patch is used to fix part of these violations. 1.Add a new structure seg_desc_vmcs to hold the VMCS field address of segment selector to clean up seg_desc structure. 2.Add the definition of maximum MSI entry and the relevant judgement. 3.The violations in shell.c, logmsg.c will be fixed in other series of patches with modification of function snprintf(), vsnprintf() and other related usages. v1->v2: *Move the definition of struct seg_desc_vmcs from instr_emul.h to instr_emul.c. *Modify the formal parameter type in function definition from uint8_t to char instead of using cast. *Drop the const declaration for char data in formal parameter. v2->v3: *update the data missing conversion. *change type of internal parameter len to avoid casting in npklog.c. *change the conversion from signed char to unsigned int in uart16550_getc() to solve sign-extension. Tracked-On: #861 Signed-off-by: Junjun Shan <junjun.shan@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
107 lines
2.5 KiB
C
107 lines
2.5 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation.
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <hypervisor.h>
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static int32_t npk_log_enabled, npk_log_setup_ref;
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static uint64_t base;
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static inline int npk_write(const char *value, void *addr, size_t sz)
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{
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int ret = -1;
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if (sz >= 8U) {
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mmio_write64(*(uint64_t *)value, addr);
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ret = 8;
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} else if (sz >= 4U) {
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mmio_write32(*(uint32_t *)value, addr);
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ret = 4;
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} else if (sz >= 2U) {
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mmio_write16(*(uint16_t *)value, addr);
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ret = 2;
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} else if (sz >= 1U) {
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mmio_write8(*(uint8_t *)value, addr);
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ret = 1;
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}
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return ret;
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}
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void npk_log_setup(struct hv_npk_log_param *param)
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{
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int i;
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pr_info("HV_NPK_LOG: cmd %d param 0x%llx\n", param->cmd,
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param->mmio_addr);
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param->res = HV_NPK_LOG_RES_KO;
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if (atomic_inc_return(&npk_log_setup_ref) > 1)
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goto out;
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switch (param->cmd) {
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case HV_NPK_LOG_CMD_CONF:
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if (param->mmio_addr || param->loglevel != 0xffffU)
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param->res = HV_NPK_LOG_RES_OK;
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case HV_NPK_LOG_CMD_ENABLE:
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if (param->mmio_addr)
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base = param->mmio_addr;
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if (param->loglevel != 0xffffU)
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npk_loglevel = param->loglevel;
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if (base && param->cmd == HV_NPK_LOG_CMD_ENABLE) {
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if (!npk_log_enabled)
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for (i = 0; i < phys_cpu_num; i++)
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per_cpu(npk_log_ref, i) = 0;
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param->res = HV_NPK_LOG_RES_OK;
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npk_log_enabled = 1;
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}
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break;
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case HV_NPK_LOG_CMD_DISABLE:
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npk_log_enabled = 0;
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param->res = HV_NPK_LOG_RES_OK;
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break;
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case HV_NPK_LOG_CMD_QUERY:
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param->res = npk_log_enabled ? HV_NPK_LOG_RES_ENABLED :
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HV_NPK_LOG_RES_DISABLED;
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param->loglevel = npk_loglevel;
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param->mmio_addr = base;
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break;
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default:
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pr_err("HV_NPK_LOG: unknown cmd (%d)\n", param->cmd);
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break;
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}
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out:
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pr_info("HV_NPK_LOG: result %d\n", param->res);
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atomic_dec32((uint32_t *)&npk_log_setup_ref);
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}
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void npk_log_write(const char *buf, size_t buf_len)
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{
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uint32_t cpu_id = get_cpu_id();
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struct npk_chan *channel = (struct npk_chan *)base;
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const char *p = buf;
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int sz;
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uint32_t ref;
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uint16_t len;
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if (!npk_log_enabled || !channel)
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return;
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/* calculate the channel offset based on cpu_id and npk_log_ref */
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ref = (atomic_inc_return((int32_t *)&per_cpu(npk_log_ref, cpu_id)) - 1)
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& HV_NPK_LOG_REF_MASK;
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channel += (cpu_id << HV_NPK_LOG_REF_SHIFT) + ref;
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len = (uint16_t)(min(buf_len, HV_NPK_LOG_MAX));
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mmio_write32(HV_NPK_LOG_HDR, &(channel->DnTS));
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mmio_write16(len, &(channel->Dn));
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for (sz = 0; sz >= 0; p += sz)
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sz = npk_write(p, &(channel->Dn), buf + len - p);
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mmio_write8(0U, &(channel->FLAG));
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atomic_dec32(&per_cpu(npk_log_ref, cpu_id));
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}
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