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https://github.com/projectacrn/acrn-hypervisor.git
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22a1bd6948
In 64-bit mode, processor pushes SS and RSP onto stack unconditionally. Also when dumping the exception info, it makes more sense to dump the RSP at the point of interrupt, rather than the RSP after pushing context (including GPRs) Tracked-On: #4102 Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
324 lines
7.5 KiB
C
324 lines
7.5 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef ARCH_IRQ_H
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#define ARCH_IRQ_H
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#include <acrn_common.h>
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#include <util.h>
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#include <spinlock.h>
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/**
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* @file arch/x86/irq.h
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*
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* @brief public APIs for virtual IRQ
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*/
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#define ACRN_DBG_PTIRQ 6U
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#define ACRN_DBG_IRQ 6U
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/* vectors range for dynamic allocation, usually for devices */
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#define VECTOR_DYNAMIC_START 0x20U
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#define VECTOR_DYNAMIC_END 0xDFU
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/* vectors range for fixed vectors, usually for HV service */
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#define VECTOR_FIXED_START 0xE0U
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#define VECTOR_FIXED_END 0xFFU
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#define VECTOR_TIMER 0xEFU
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#define VECTOR_NOTIFY_VCPU 0xF0U
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#define VECTOR_POSTED_INTR 0xF2U
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#define VECTOR_VIRT_IRQ_VHM 0xF7U
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#define VECTOR_SPURIOUS 0xFFU
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#define VECTOR_HYPERVISOR_CALLBACK_VHM 0xF3U
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#define VECTOR_PMI 0xF4U
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/* the maximum number of msi entry is 2048 according to PCI
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* local bus specification
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*/
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#define MAX_MSI_ENTRY 0x800U
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#define NR_MAX_VECTOR 0xFFU
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#define VECTOR_INVALID (NR_MAX_VECTOR + 1U)
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#define NR_IRQS 256U
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#define IRQ_INVALID 0xffffffffU
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#define NR_STATIC_MAPPINGS (4U)
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#define TIMER_IRQ (NR_IRQS - 1U)
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#define NOTIFY_IRQ (NR_IRQS - 2U)
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#define POSTED_INTR_NOTIFY_IRQ (NR_IRQS - 3U)
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#define PMI_IRQ (NR_IRQS - 4U)
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#define DEFAULT_DEST_MODE IOAPIC_RTE_DESTMODE_LOGICAL
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#define DEFAULT_DELIVERY_MODE IOAPIC_RTE_DELMODE_LOPRI
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#define ALL_CPUS_MASK (uint32_t) (((uint32_t)1U << (uint32_t) get_pcpu_nums()) - (uint32_t)1U)
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#define IRQ_ALLOC_BITMAP_SIZE INT_DIV_ROUNDUP(NR_IRQS, 64U)
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#define INVALID_INTERRUPT_PIN 0xffffffffU
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#define IRQF_NONE (0U)
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#define IRQF_LEVEL (1U << 1U) /* 1: level trigger; 0: edge trigger */
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#define IRQF_PT (1U << 2U) /* 1: for passthrough dev */
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struct acrn_vcpu;
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/*
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* Definition of the stack frame layout
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*/
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struct intr_excp_ctx {
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struct acrn_gp_regs gp_regs;
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uint64_t vector;
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uint64_t error_code;
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uint64_t rip;
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uint64_t cs;
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uint64_t rflags;
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uint64_t rsp;
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uint64_t ss;
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};
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typedef void (*smp_call_func_t)(void *data);
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struct smp_call_info_data {
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smp_call_func_t func;
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void *data;
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};
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void smp_call_function(uint64_t mask, smp_call_func_t func, void *data);
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void init_default_irqs(uint16_t cpu_id);
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void dispatch_exception(struct intr_excp_ctx *ctx);
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void setup_notification(void);
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void setup_posted_intr_notification(void);
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typedef void (*spurious_handler_t)(uint32_t vector);
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extern spurious_handler_t spurious_handler;
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uint32_t alloc_irq_num(uint32_t req_irq);
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uint32_t alloc_irq_vector(uint32_t irq);
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/* RFLAGS */
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#define HV_ARCH_VCPU_RFLAGS_IF (1UL<<9U)
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#define HV_ARCH_VCPU_RFLAGS_RF (1UL<<16U)
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/* Interruptability State info */
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#define HV_ARCH_VCPU_BLOCKED_BY_MOVSS (1UL<<1U)
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#define HV_ARCH_VCPU_BLOCKED_BY_STI (1UL<<0U)
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/**
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* @brief virtual IRQ
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*
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* @addtogroup acrn_virq ACRN vIRQ
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* @{
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*/
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/**
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* @brief Queue exception to guest.
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*
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* This exception may be injected immediately or later,
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* depends on the exeception class.
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*
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* @param[in] vcpu Pointer to vCPU.
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* @param[in] vector_arg Vector of the exeception.
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* @param[in] err_code_arg Error Code to be injected.
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*
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* @retval 0 on success
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* @retval -EINVAL on error that vector is invalid.
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*
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* @pre vcpu != NULL
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*/
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int32_t vcpu_queue_exception(struct acrn_vcpu *vcpu, uint32_t vector_arg, uint32_t err_code_arg);
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/**
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* @brief Inject external interrupt to guest.
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*
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* @param[in] vcpu Pointer to vCPU.
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*
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* @return None
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*
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* @pre vcpu != NULL
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*/
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void vcpu_inject_extint(struct acrn_vcpu *vcpu);
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/**
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* @brief Inject NMI to guest.
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*
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* @param[in] vcpu Pointer to vCPU.
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*
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* @return None
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*
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* @pre vcpu != NULL
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*/
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void vcpu_inject_nmi(struct acrn_vcpu *vcpu);
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/**
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* @brief Inject general protection exeception(GP) to guest.
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*
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* @param[in] vcpu Pointer to vCPU.
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* @param[in] err_code Error Code to be injected.
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*
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* @return None
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*
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* @pre vcpu != NULL
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*/
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void vcpu_inject_gp(struct acrn_vcpu *vcpu, uint32_t err_code);
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/**
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* @brief Inject page fault exeception(PF) to guest.
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*
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* @param[in] vcpu Pointer to vCPU.
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* @param[in] addr Address that result in PF.
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* @param[in] err_code Error Code to be injected.
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*
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* @return None
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*
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* @pre vcpu != NULL
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*/
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void vcpu_inject_pf(struct acrn_vcpu *vcpu, uint64_t addr, uint32_t err_code);
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/**
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* @brief Inject invalid opcode exeception(UD) to guest.
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*
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* @param[in] vcpu Pointer to vCPU.
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*
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* @return None
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*
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* @pre vcpu != NULL
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*/
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void vcpu_inject_ud(struct acrn_vcpu *vcpu);
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/**
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* @brief Inject stack fault exeception(SS) to guest.
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*
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* @param[in] vcpu Pointer to vCPU.
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*
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* @return None
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*
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* @pre vcpu != NULL
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*/
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void vcpu_inject_ss(struct acrn_vcpu *vcpu);
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void vcpu_make_request(struct acrn_vcpu *vcpu, uint16_t eventid);
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/*
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* @pre vcpu != NULL
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*/
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int32_t exception_vmexit_handler(struct acrn_vcpu *vcpu);
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int32_t interrupt_window_vmexit_handler(struct acrn_vcpu *vcpu);
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int32_t external_interrupt_vmexit_handler(struct acrn_vcpu *vcpu);
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int32_t acrn_handle_pending_request(struct acrn_vcpu *vcpu);
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extern uint64_t irq_alloc_bitmap[IRQ_ALLOC_BITMAP_SIZE];
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typedef void (*irq_action_t)(uint32_t irq, void *priv_data);
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/**
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* @brief Interrupt descriptor
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*
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* Any field change in below required lock protection with irqsave
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*/
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struct irq_desc {
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uint32_t irq; /**< index to irq_desc_base */
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uint32_t vector; /**< assigned vector */
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irq_action_t action; /**< callback registered from component */
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void *priv_data; /**< irq_action private data */
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uint32_t flags; /**< flags for trigger mode/ptdev */
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spinlock_t lock;
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#ifdef PROFILING_ON
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uint64_t ctx_rip;
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uint64_t ctx_rflags;
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uint64_t ctx_cs;
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#endif
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};
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/**
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* @defgroup phys_int_ext_apis Physical Interrupt External Interfaces
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*
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* This is a group that includes Physical Interrupt External Interfaces.
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*
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* @{
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*/
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/**
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* @brief Request an interrupt
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*
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* Request interrupt num if not specified, and register irq action for the
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* specified/allocated irq.
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*
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* @param[in] req_irq irq_num to request, if IRQ_INVALID, a free irq
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* number will be allocated
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* @param[in] action_fn Function to be called when the IRQ occurs
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* @param[in] priv_data Private data for action function.
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* @param[in] flags Interrupt type flags, including:
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* IRQF_NONE;
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* IRQF_LEVEL - 1: level trigger; 0: edge trigger;
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* IRQF_PT - 1: for passthrough dev
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*
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* @retval >=0 on success
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* @retval IRQ_INVALID on failure
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*/
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int32_t request_irq(uint32_t req_irq, irq_action_t action_fn, void *priv_data,
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uint32_t flags);
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/**
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* @brief Free an interrupt
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*
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* Free irq num and unregister the irq action.
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*
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* @param[in] irq irq_num to be freed
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*/
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void free_irq(uint32_t irq);
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/**
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* @brief Set interrupt trigger mode
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*
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* Set the irq trigger mode: edge-triggered or level-triggered
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*
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* @param[in] irq irq_num of interrupt to be set
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* @param[in] is_level_triggered Trigger mode to set
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*/
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void set_irq_trigger_mode(uint32_t irq, bool is_level_triggered);
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/**
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* @brief Get vector number of an interrupt from irq number
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*
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* @param[in] irq The irq_num to convert
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*
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* @return vector number
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*/
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uint32_t irq_to_vector(uint32_t irq);
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/**
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* @brief Dispatch interrupt
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*
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* To dispatch an interrupt, an action callback will be called if registered.
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*
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* @param ctx Pointer to interrupt exception context
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*/
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void dispatch_interrupt(const struct intr_excp_ctx *ctx);
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/**
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* @brief Initialize interrupt
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*
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* To do interrupt initialization for a cpu, will be called for each physical cpu.
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*
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* @param[in] pcpu_id The id of physical cpu to initialize
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*/
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void init_interrupt(uint16_t pcpu_id);
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/**
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* @}
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*/
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/* End of phys_int_ext_apis */
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/**
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* @}
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*/
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/* End of acrn_virq */
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#endif /* ARCH_IRQ_H */
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