acrn-hypervisor/hypervisor/include
Binbin Wu f0d06165d3 hv: vmsr: handle guest msr ia32_misc_enable read/write
Guest MSR_IA32_MISC_ENABLE read simply returns the value set by guest.
Guest MSR_IA32_MISC_ENABLE write:
- Clear EFER.NXE if MSR_IA32_MISC_ENABLE_XD_DISABLE set.
- MSR_IA32_MISC_ENABLE_MONITOR_ENA:
  Allow guest to control this feature when HV doesn't use this feature and hw has no bug.

vcpuid update according to the change of the msr will be covered in following patch.

Tracked-On: #2834
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-05-09 16:35:15 +08:00
..
arch/x86 hv: vmsr: handle guest msr ia32_misc_enable read/write 2019-05-09 16:35:15 +08:00
common hv: release IOMMU irte when releasing ptirq remapping entries 2019-05-06 18:25:37 +08:00
debug HV: vuart: support MSR and MCR 2019-04-29 15:25:39 +08:00
dm HV: rename 'type' in struct io_request 2019-05-06 18:25:20 +08:00
hw hv: move pci.h to include/hw 2019-04-12 10:09:26 +08:00
lib hv:remove some unnecessary includes 2019-05-07 09:10:13 +08:00
public hv: add new hypercall to fetch platform configurations 2019-04-15 22:14:13 +08:00