Binbin Wu f1b9f5ac97 hv: cpu: using struct cpu_gp_regs for general-purpose regs in inter_excp_ctx ...

The purpos is to unify the layout of general-purpose regs in interrupt/excpetion context.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>

2018-07-25 13:05:38 +08:00

..

console.c

hv:fix MISRA-C return value violation

2018-07-13 13:04:39 +08:00

dump.c

hv: cpu: using struct cpu_gp_regs for general-purpose regs in inter_excp_ctx

2018-07-25 13:05:38 +08:00

logmsg.c

HV: logical and high level precedence expression needs brackets

2018-07-24 10:10:39 +08:00

printf.c

hv:fix MISRA-C return value violation

2018-07-13 13:04:39 +08:00

sbuf.c

HV: Fix missing brackets for MISRA C Violations

2018-07-13 09:09:12 +08:00

serial_internal.h

HV:treewide:Update the type of return value and parameters of atomic operations

2018-07-19 14:39:47 +08:00

serial.c

HV: Fix new MISRAC violations for brackets

2018-07-16 11:02:38 +08:00

shell_internal.c

hv: cpu: align general-purpose register layout with vmx

2018-07-25 13:05:38 +08:00

shell_internal.h

hv: treewide: fix 'No definition in system for prototyped procedure'

2018-07-20 10:38:32 +08:00

shell_public.c

HV: Fix missing brackets for MISRA C Violations

2018-07-13 09:09:12 +08:00

uart16550.c

HV:treewide:Update the type of return value and parameters of atomic operations

2018-07-19 14:39:47 +08:00

uart16550.h

HV: treewide: convert hexadecimals used in bitops to unsigned

2018-06-21 13:12:39 +08:00

vuart.c

HV: prototyping non-static function

2018-07-16 10:35:54 +08:00