Sainath Grandhi f3cf93656a hv: Handle holes in GSI i.e. Global System Interrupt for multiple IO-APICs ...

MADT is used to specify the GSI base for each IO-APIC and the number of
interrupt pins per IO-APIC is programmed into Max. Redir. Entry register of
that IO-APIC.

On platforms with multiple IO-APICs, there can be holes in the GSI space.
For example, on a platform with 2 IO-APICs, the following configuration has
a hole (from 24 to 31) in the GSI space.

IO-APIC 1: GSI base - 0, number of pins - 24
IO-APIC 2: GSI base - 32, number of pins - 8

This patch also adjusts the size for variables used to represent the total
number of IO-APICs on the system from uint16_t to uint8_t as the ACPI MADT
uses only 8-bits to indicate the unique IO-APIC IDs.

Tracked-On: #4151
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>

2020-04-13 11:39:58 +08:00

..

console.c

HV: remove DBG_LEVEL_PARSE

2020-02-26 09:24:16 +08:00

dbg_cmd.c

hv:fix "no prototype for non-static function"

2019-07-09 10:36:03 +08:00

dump.c

hv:remove show_guest_call_trace

2019-11-26 10:58:19 +08:00

hypercall.c

hv:refine 'uint64_t' string print format in comm moudle

2019-11-09 11:42:38 +08:00

logmsg.c

hv: print current sched_object in acrn logmsg

2019-12-05 11:19:35 +08:00

Makefile

hv:fix a bug for building debug/release lib

2019-06-26 15:22:57 +08:00

npk_log.c

hv: refine 'uint64_t' string print format in debug moudle

2019-11-09 11:42:38 +08:00

printf.c

hv:cleanup header files for debug folder

2019-02-27 11:12:48 +08:00

profiling.c

hv: rename BOOT_CPU_ID to BSP_CPU_ID

2020-02-25 09:08:14 +08:00

sbuf.c

HV: fix sbuf "Casting operation to a pointer"

2019-07-11 13:57:21 +08:00

shell_priv.h

hv:add dump_guest_mem

2019-11-26 10:58:19 +08:00

shell.c

hv: Handle holes in GSI i.e. Global System Interrupt for multiple IO-APICs

2020-04-13 11:39:58 +08:00

string.c

hv:cleanup header files for debug folder

2019-02-27 11:12:48 +08:00

trace.c

HV: fix sbuf "Casting operation to a pointer"

2019-07-11 13:57:21 +08:00

uart16550.c

hv: pci: rename CFG read/write function for PCI-compatible Configuration Mechanism

2020-03-12 09:17:02 +08:00