Files
acrn-hypervisor/hypervisor/arch/x86
Binbin Wu f3ffce4be1 hv: vmexit: ecx should be checked instead of rcx when xsetbv
According to SDM, xsetbv writes the contents of registers EDX:EAX into the 64-bit
extended control register (XCR) specified in the ECX register. (On processors
that support the Intel 64 architecture, the high-order 32 bits of RCX are ignored.)

In current code, RCX is checked, should ingore the high-order 32bits.

Tracked-On: #3360
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Yonghua Huang <yonghua.huang@intel.com>
2019-07-05 09:48:53 +08:00
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