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https://github.com/projectacrn/acrn-hypervisor.git
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f7f2cc8e43
for (int i = 0; i < ...; i++) is only allowed in C99 mode, so fix this coding style to: int i; for (i = 0; i < ...; i++) Signed-off-by: Victor Sun <victor.sun@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
231 lines
6.3 KiB
C
231 lines
6.3 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <stdlib.h>
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#include <string.h>
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#include <stdbool.h>
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#include "vmm.h"
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#include "vmmapi.h"
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#include "dm.h"
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#include "acpi.h"
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static uint8_t get_vcpu_px_cnt(struct vmctx *ctx, int vcpu_id)
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{
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uint64_t pm_ioctl_buf = 0;
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enum pm_cmd_type cmd_type = PMCMD_GET_PX_CNT;
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pm_ioctl_buf = ((ctx->vmid << PMCMD_VMID_SHIFT) & PMCMD_VMID_MASK)
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| ((vcpu_id << PMCMD_VCPUID_SHIFT) & PMCMD_VCPUID_MASK)
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| cmd_type;
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if (vm_get_cpu_state(ctx, &pm_ioctl_buf)) {
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return 0;
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}
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return (uint8_t)pm_ioctl_buf;
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}
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static int get_vcpu_px_data(struct vmctx *ctx, int vcpu_id,
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int px_num, struct cpu_px_data *vcpu_px_data)
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{
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uint64_t *pm_ioctl_buf;
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enum pm_cmd_type cmd_type = PMCMD_GET_PX_DATA;
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pm_ioctl_buf = malloc(sizeof(struct cpu_px_data));
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if (!pm_ioctl_buf) {
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return -1;
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}
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*pm_ioctl_buf = ((ctx->vmid << PMCMD_VMID_SHIFT) & PMCMD_VMID_MASK)
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| ((vcpu_id << PMCMD_VCPUID_SHIFT) & PMCMD_VCPUID_MASK)
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| ((px_num << PMCMD_STATE_NUM_SHIFT) & PMCMD_STATE_NUM_MASK)
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| cmd_type;
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/* get and validate px data */
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if (vm_get_cpu_state(ctx, pm_ioctl_buf)) {
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free(pm_ioctl_buf);
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return -1;
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}
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memcpy(vcpu_px_data, pm_ioctl_buf,
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sizeof(struct cpu_px_data));
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free(pm_ioctl_buf);
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return 0;
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}
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/* _PPC: Performance Present Capabilities
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* hard code _PPC to 0, all states are available.
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*/
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static void dsdt_write_ppc(void)
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{
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dsdt_line(" Name (_PPC, Zero)");
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}
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/* _PCT: Performance Control
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* Both Performance Control and Status Register are set to FFixedHW
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*/
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static void dsdt_write_pct(void)
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{
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dsdt_line(" Method (_PCT, 0, NotSerialized)");
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dsdt_line(" {");
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dsdt_line(" Return (Package (0x02)");
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dsdt_line(" {");
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dsdt_line(" ResourceTemplate ()");
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dsdt_line(" {");
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dsdt_line(" Register (FFixedHW,");
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dsdt_line(" 0x00,");
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dsdt_line(" 0x00,");
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dsdt_line(" 0x0000000000000000,");
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dsdt_line(" ,)");
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dsdt_line(" },");
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dsdt_line("");
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dsdt_line(" ResourceTemplate ()");
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dsdt_line(" {");
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dsdt_line(" Register (FFixedHW,");
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dsdt_line(" 0x00,");
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dsdt_line(" 0x00,");
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dsdt_line(" 0x0000000000000000,");
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dsdt_line(" ,)");
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dsdt_line(" }");
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dsdt_line(" })");
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dsdt_line(" }");
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}
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/* _PSS: Performance Supported States
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*/
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static void dsdt_write_pss(struct vmctx *ctx, int vcpu_id)
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{
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uint8_t vcpu_px_cnt;
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int i;
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struct cpu_px_data *vcpu_px_data;
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vcpu_px_cnt = get_vcpu_px_cnt(ctx, vcpu_id);
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if (!vcpu_px_cnt) {
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return;
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}
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vcpu_px_data = malloc(vcpu_px_cnt * sizeof(struct cpu_px_data));
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if (!vcpu_px_data) {
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return;
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}
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/* copy and validate px data first */
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for (i = 0; i < vcpu_px_cnt; i++) {
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if (get_vcpu_px_data(ctx, vcpu_id, i, vcpu_px_data + i)) {
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/* something must be wrong, so skip the write. */
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free(vcpu_px_data);
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return;
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}
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}
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dsdt_line("");
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dsdt_line(" Method (_PSS, 0, NotSerialized)");
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dsdt_line(" {");
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dsdt_line(" Return (Package (0x%02X)", vcpu_px_cnt);
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dsdt_line(" {");
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for (i = 0; i < vcpu_px_cnt; i++) {
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dsdt_line(" Package (0x%02X)", 6);
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dsdt_line(" {");
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dsdt_line(" 0x%08X,",
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(vcpu_px_data + i)->core_frequency);
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dsdt_line(" 0x%08X,",
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(vcpu_px_data + i)->power);
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dsdt_line(" 0x%08X,",
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(vcpu_px_data + i)->transition_latency);
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dsdt_line(" 0x%08X,",
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(vcpu_px_data + i)->bus_master_latency);
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dsdt_line(" 0x%08X,",
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(vcpu_px_data + i)->control);
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dsdt_line(" 0x%08X",
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(vcpu_px_data + i)->status);
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if (i == (vcpu_px_cnt - 1)) {
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dsdt_line(" }");
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} else {
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dsdt_line(" },");
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}
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}
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dsdt_line(" })");
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dsdt_line(" }");
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free(vcpu_px_data);
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}
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void pm_write_dsdt(struct vmctx *ctx, int ncpu)
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{
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int i;
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/* Scope (_PR) */
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dsdt_line("");
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dsdt_line(" Scope (_PR)");
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dsdt_line(" {");
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for (i = 0; i < ncpu; i++) {
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dsdt_line(" Processor (CPU%d, 0x%02X, 0x00000000, 0x00) {}",
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i, i);
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}
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dsdt_line(" }");
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dsdt_line("");
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/* Scope (_PR.CPU(N)) */
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for (i = 0; i < ncpu; i++) {
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dsdt_line(" Scope (_PR.CPU%d)", i);
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dsdt_line(" {");
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dsdt_line("");
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dsdt_write_pss(ctx, i);
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/* hard code _PPC and _PCT for all vpu */
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if (i == 0) {
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dsdt_write_ppc();
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dsdt_write_pct();
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} else {
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dsdt_line(" Method (_PPC, 0, NotSerialized)");
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dsdt_line(" {");
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dsdt_line(" Return (^^CPU0._PPC)");
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dsdt_line(" }");
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dsdt_line("");
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dsdt_line(" Method (_PCT, 0, NotSerialized)");
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dsdt_line(" {");
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dsdt_line(" Return (^^CPU0._PCT)");
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dsdt_line(" }");
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dsdt_line("");
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}
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dsdt_line(" }");
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}
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}
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