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ddfcb8c3fc
This patch can fetch the thermal lvt irq and propagate it to VM. At this stage we support the case that there is only one VM governing thermal. And we pass the hardware thermal irq to this VM. First, we register the handler for thermal lvt interrupt, its irq vector is THERMAL_VECTOR and the handler is thermal_irq_handler(). Then, when a thermal irq occurs, it flags the SOFTIRQ_THERMAL bit of softirq_pending, This bit triggers the thermal_softirq() function. And this function will inject the virtual thermal irq to VM. Tracked-On: #8595 Signed-off-by: Zhangwei6 <wei6.zhang@intel.com> Reviewed-by: Junjie Mao <junjie.mao@intel.com>
139 lines
4.0 KiB
C
139 lines
4.0 KiB
C
/*
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* Copyright (C) 2018-2022 Intel Corporation.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef ARCH_X86_IRQ_H
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#define ARCH_X86_IRQ_H
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#include <types.h>
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/**
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* @file arch/x86/asm/irq.h
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*
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* @brief public APIs for x86 IRQ handling
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*/
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#define DBG_LEVEL_PTIRQ 6U
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#define DBG_LEVEL_IRQ 6U
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#define NR_MAX_VECTOR 0xFFU
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#define VECTOR_INVALID (NR_MAX_VECTOR + 1U)
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/* # of NR_STATIC_MAPPINGS_1 entries for timer, vcpu notify, and PMI */
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#define NR_STATIC_MAPPINGS_1 4U
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/*
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* The static IRQ/Vector mapping table in irq.c consists of the following entries:
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* # of NR_STATIC_MAPPINGS_1 entries for timer, vcpu notify, and PMI
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*
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* # of CONFIG_MAX_VM_NUM entries for posted interrupt notification, platform
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* specific but known at build time:
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* Allocate unique Activation Notification Vectors (ANV) for each vCPU that belongs
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* to the same pCPU, the ANVs need only be unique within each pCPU, not across all
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* vCPUs. The max numbers of vCPUs may be running on top of a pCPU is CONFIG_MAX_VM_NUM,
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* since ACRN does not support 2 vCPUs of same VM running on top of same pCPU.
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* This reduces # of pre-allocated ANVs for posted interrupts to CONFIG_MAX_VM_NUM,
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* and enables ACRN to avoid switching between active and wake-up vector values
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* in the posted interrupt descriptor on vCPU scheduling state changes.
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*/
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#define NR_STATIC_MAPPINGS (NR_STATIC_MAPPINGS_1 + CONFIG_MAX_VM_NUM)
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#define HYPERVISOR_CALLBACK_HSM_VECTOR 0xF3U
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/* vectors range for dynamic allocation, usually for devices */
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#define VECTOR_DYNAMIC_START 0x20U
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#define VECTOR_DYNAMIC_END 0xDFU
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/* vectors range for fixed vectors, usually for HV service */
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#define VECTOR_FIXED_START 0xE0U
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#define VECTOR_FIXED_END 0xFFU
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#define TIMER_VECTOR (VECTOR_FIXED_START)
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#define NOTIFY_VCPU_VECTOR (VECTOR_FIXED_START + 1U)
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#define PMI_VECTOR (VECTOR_FIXED_START + 2U)
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#define THERMAL_VECTOR (VECTOR_FIXED_START + 3U)
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/*
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* Starting vector for posted interrupts
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* # of CONFIG_MAX_VM_NUM (POSTED_INTR_VECTOR ~ (POSTED_INTR_VECTOR + CONFIG_MAX_VM_NUM - 1U))
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* consecutive vectors reserved for posted interrupts
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*/
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#define POSTED_INTR_VECTOR (VECTOR_FIXED_START + NR_STATIC_MAPPINGS_1)
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#define TIMER_IRQ (NR_IRQS - 1U)
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#define NOTIFY_VCPU_IRQ (NR_IRQS - 2U)
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#define PMI_IRQ (NR_IRQS - 3U)
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#define THERMAL_IRQ (NR_IRQS - 4U)
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/*
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* Starting IRQ for posted interrupts
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* # of CONFIG_MAX_VM_NUM (POSTED_INTR_IRQ ~ (POSTED_INTR_IRQ + CONFIG_MAX_VM_NUM - 1U))
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* consecutive IRQs reserved for posted interrupts
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*/
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#define POSTED_INTR_IRQ (NR_IRQS - NR_STATIC_MAPPINGS_1 - CONFIG_MAX_VM_NUM)
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/* the maximum number of msi entry is 2048 according to PCI
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* local bus specification
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*/
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#define MAX_MSI_ENTRY 0x800U
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#define INVALID_INTERRUPT_PIN 0xffffffffU
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/*
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* x86 irq data
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*/
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struct x86_irq_data {
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uint32_t vector; /**< assigned vector */
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#ifdef PROFILING_ON
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uint64_t ctx_rip;
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uint64_t ctx_rflags;
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uint64_t ctx_cs;
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#endif
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};
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struct intr_excp_ctx;
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/**
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* @brief Allocate a vectror and bind it to irq
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*
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* For legacy irq (num < 16) and statically mapped ones, do nothing
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* if mapping is correct.
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*
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* @param[in] irq The irq num to bind
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*
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* @return valid vector num on susccess, VECTOR_INVALID on failure
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*/
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uint32_t alloc_irq_vector(uint32_t irq);
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/**
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* @brief Get vector number of an interrupt from irq number
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*
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* @param[in] irq The irq_num to convert
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*
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* @return vector number
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*/
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uint32_t irq_to_vector(uint32_t irq);
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/**
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* @brief Dispatch interrupt
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*
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* To dispatch an interrupt, an action callback will be called if registered.
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*
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* @param ctx Pointer to interrupt exception context
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*/
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void dispatch_interrupt(const struct intr_excp_ctx *ctx);
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/* Arch specific routines called from generic IRQ handling */
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struct irq_desc;
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void init_irq_descs_arch(struct irq_desc *descs);
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void setup_irqs_arch(void);
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void init_interrupt_arch(uint16_t pcpu_id);
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void free_irq_arch(uint32_t irq);
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bool request_irq_arch(uint32_t irq);
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void pre_irq_arch(const struct irq_desc *desc);
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void post_irq_arch(const struct irq_desc *desc);
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#endif /* ARCH_X86_IRQ_H */
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