acrn-hypervisor/hypervisor/arch/x86
Yifan Liu fa6b55db68 hv: tee: Handling x86_tee secure interrupts corner cases
Previous upstreamed patches handles the secure/non-secure interrupts in
handle_x86_tee_int. However there is a corner case in which there might
be unhandled secure interrupts (in a very short time window) when TEE
yields vCPU. For this case we always make sure that no secure interrupts
are pending in TEE's vlapic before scheduling REE.

Also in previous patches, if non-secure interrupt comes when TEE is
handling its secure interrupts, hypervisor injects a predefined vector
into TEE's vlapic. TEE does not consume this vector in secure interrupt
handling routine so it stays in vIRR, but it should be cleared because the
actual interrupt will be consumed in REE after VM Entry.

v3:
    Fix comments on interrupt priority

v2:
    Add comments explaining the priority of secure/non-secure interrupts

Tracked-On: #6571
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2021-12-09 10:47:16 +08:00
..
boot HV: fix MISRA violation of _ld_ram_xxx 2021-11-26 16:45:17 +08:00
configs hv: remove UUID 2021-11-16 14:42:59 +08:00
guest hv: tee: Handling x86_tee secure interrupts corner cases 2021-12-09 10:47:16 +08:00
lib HV: rewrite memcpy_s to be iso c11 compliant 2020-06-08 13:30:04 +08:00
seed ACRN: hv: Terminology modification in hv code 2021-11-02 10:00:55 +08:00
cpu_caps.c HV: treewide: fix violations of coding guideline C-TY-12 2021-11-04 18:15:47 +08:00
cpu_state_tbl.c HV: treewide: fix violations of coding guideline C-TY-12 2021-11-04 18:15:47 +08:00
cpu.c hv: vCAT: initialize the emulated_guest_msrs array for CAT msrs during platform initialization 2021-10-26 11:48:27 +08:00
e820.c hv : encapsulate page align in e820_alloc_memory 2021-11-12 11:56:03 +08:00
exception.c hv: mod: do not use explicit arch name when including headers 2021-05-08 11:15:46 +08:00
gdt.c hv: mod: do not use explicit arch name when including headers 2021-05-08 11:15:46 +08:00
idt.S hv: mod: do not use explicit arch name when including headers 2021-05-08 11:15:46 +08:00
init.c hv: remove CONFIG_LOG_DESTINATION 2021-12-06 14:24:40 +08:00
ioapic.c hv: paging: rename ppt_set/clear_ATTR to set_paging_ATTR 2021-05-14 09:18:00 +08:00
irq.c HV: treewide: fix violations of coding guideline C-TY-27 & C-TY-28 2021-11-04 18:15:47 +08:00
lapic.c hv/mod_timer: separate delay functions from the timer module 2021-05-18 16:43:28 +08:00
mmu.c HV: fix MISRA violation of _ld_ram_xxx 2021-11-26 16:45:17 +08:00
nmi.c hv: mod: do not use explicit arch name when including headers 2021-05-08 11:15:46 +08:00
notify.c ACRN: hv: Terminology modification in hv code 2021-11-02 10:00:55 +08:00
page.c HV: treewide: fix violations of coding guideline C-EP-05 2021-11-04 18:15:47 +08:00
pagetable.c hv: mod: do not use explicit arch name when including headers 2021-05-08 11:15:46 +08:00
platform_caps.c hv: mod: do not use explicit arch name when including headers 2021-05-08 11:15:46 +08:00
pm.c hv: dm: Use new power management data structures 2021-07-15 11:53:54 +08:00
rdt.c hv: vCAT: initialize vCAT MSRs during vmcs init 2021-10-28 19:12:29 +08:00
rtcm.c hv: update RTCT ACPI table detecting 2021-06-01 08:22:20 +08:00
sched.S hv: sched: rename schedule related structs and vars 2019-10-16 10:25:53 +08:00
security.c hv: mod: do not use explicit arch name when including headers 2021-05-08 11:15:46 +08:00
sgx.c hv: mod: do not use explicit arch name when including headers 2021-05-08 11:15:46 +08:00
trampoline.c hv: remove CONFIG_LOW_RAM_SIZE 2021-11-12 11:56:03 +08:00
tsc_deadline_timer.c HV: arch: fix a violation of coding guideline C-TY-24 2021-11-04 18:15:47 +08:00
tsc.c hv/mod_timer: split tsc handling code from timer. 2021-05-18 16:43:28 +08:00
vmx.c hv: VMPTRLD and VMCLEAR VMCS with the common APIs 2021-05-26 11:22:26 +08:00
vtd.c hv: align the MAX_IR_ENTRIES to MAX_PT_IRQ_ENTRIES 2021-11-15 09:00:27 +08:00
wakeup.S hv: pm: correct the function name 2019-09-11 17:30:24 +08:00