Grandhi, Sainath fb6e9267f3 hv: Support Queued Invalidation ...

As we enable Interrupt Remapping Hardware in ACRN, Queued Invalidation
(QI) needs to be used clear DMAR hardware caches. This patch introduces
Queued Invalidation APIs. Code related to Register based Invalidation
is removed from ACRN and platforms that do not support QI cannot boot
with ACRN after this patch.

Tracked-On: #2426
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Binbin Wu <binbin.wu@intel.com>

2019-02-01 15:54:55 +08:00

..

x86

hv: Support Queued Invalidation

2019-02-01 15:54:55 +08:00