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https://github.com/projectacrn/acrn-hypervisor.git
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f67a437e5a
extract common barrier interface to include/lib/barrier.h, and invoke the variant implementation of arch. Tracked-On: #8803 Signed-off-by: Haoyu Tang <haoyu.tang@intel.com> Reviewed-by: Yifan Liu <yifan1.liu@intel.com> Acked-by: Wang, Yu1 <yu1.wang@intel.com>
41 lines
1.1 KiB
C
41 lines
1.1 KiB
C
/*
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* Copyright (C) 2025 Intel Corporation.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef BARRIER_H
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#define BARRIER_H
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#include <types.h>
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#include <asm/lib/barrier.h>
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/* The mandatory functions should be implemented by arch barrier library */
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static inline void arch_cpu_read_memory_barrier(void);
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static inline void arch_cpu_write_memory_barrier(void);
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static inline void arch_cpu_memory_barrier(void);
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/* The common functions map to arch implementation */
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/* Synchronizes all write accesses to memory */
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static inline void cpu_write_memory_barrier(void)
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{
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return arch_cpu_write_memory_barrier();
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}
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/* Synchronizes all read accesses from memory */
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static inline void cpu_read_memory_barrier(void)
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{
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return arch_cpu_read_memory_barrier();
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}
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/* Synchronizes all read and write accesses to/from memory */
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static inline void cpu_memory_barrier(void)
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{
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return arch_cpu_memory_barrier();
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}
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/* Prevents compilers from reordering read/write access across this barrier */
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static inline void cpu_compiler_barrier(void)
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{
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asm volatile ("" : : : "memory");
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}
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#endif /* BARRIER_H */
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