Haicheng Li fc495b946a hv: riscv: irq: add interrupt initialization and handlers ...

This patch implements interrupt initialization and the basic
exception/interrupt handling flow on RISC-V.

init_interrupt() needs to be invoked during CPU initialization to
set up the trap vector and enable the interrupt.

RISC-V exception and interrupt handling includes:
- Saving and restoring CPU registers around traps
- Implementing handlers for:
  - Supervisor software interrupt
  - Supervisor timer interrupt
- Halting the CPU for all other interrupts and exceptions

------
TODOs:
1. add support for registering interrupt handlers via request_irq() and
   further adoption of the common IRQ framework.
2. add support for external interrupt.

Tracked-On: #8813
Signed-off-by: Haicheng Li <haicheng.li@intel.com>
Co-developed-by: Shiqing Gao <shiqing.gao@intel.com>
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Yifan Liu  <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>

2025-09-29 14:01:00 +08:00

..

riscv

hv: riscv: irq: add interrupt initialization and handlers

2025-09-29 14:01:00 +08:00

x86

hv: enable acrnlog in release builds

2025-09-25 16:30:26 +08:00