Sainath Grandhi fe5a108c7b hv: vioapic init for SOS VM on platforms with multiple IO-APICs ... For SOS VM, when the target platform has multiple IO-APICs, there should be equal number of virtual IO-APICs. This patch adds support for emulating multiple vIOAPICs per VM. Tracked-On: #4151 Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com> Acked-by: Eddie Dong <eddie.dong@Intel.com>		2020-03-25 09:36:18 +08:00
..
arch/x86	hv: vioapic init for SOS VM on platforms with multiple IO-APICs	2020-03-25 09:36:18 +08:00
common	hv: Introduce Global System Interrupt (GSI) into INTx Remapping	2020-03-25 09:36:18 +08:00
debug	HV: correct ept page array usage	2020-03-12 14:56:34 +08:00
dm	hv: vioapic init for SOS VM on platforms with multiple IO-APICs	2020-03-25 09:36:18 +08:00
hw	hv: vpci: handle the quirk part for pass through pci device cfg access in dm	2020-03-20 10:08:43 +08:00
lib	hv: support xsave in context switch	2019-12-02 09:31:12 +08:00
public	hv: vpci: handle the quirk part for pass through pci device cfg access in dm	2020-03-20 10:08:43 +08:00