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Merge pull request #3619 from devimc/2021-02-03/supportQEMUSGX
runtime: support QEMU SGX
This commit is contained in:
commit
046aae7e52
@ -24,6 +24,8 @@ type qemuAmd64 struct {
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vmFactory bool
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vmFactory bool
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devLoadersCount uint32
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devLoadersCount uint32
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sgxEPCSize int64
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}
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}
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const (
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const (
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@ -140,6 +142,17 @@ func newQemuArch(config HypervisorConfig) (qemuArch, error) {
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}
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}
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}
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}
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if config.SGXEPCSize != 0 {
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q.sgxEPCSize = config.SGXEPCSize
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if q.qemuMachine.Options != "" {
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q.qemuMachine.Options += ","
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}
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// qemu sandboxes will only support one EPC per sandbox
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// this is because there is only one annotation (sgx.intel.com/epc)
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// to specify the size of the EPC.
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q.qemuMachine.Options += "sgx-epc.0.memdev=epc0,sgx-epc.0.node=0"
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}
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q.handleImagePath(config)
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q.handleImagePath(config)
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return q, nil
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return q, nil
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@ -233,6 +246,16 @@ func (q *qemuAmd64) enableProtection() error {
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// append protection device
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// append protection device
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func (q *qemuAmd64) appendProtectionDevice(devices []govmmQemu.Device, firmware, firmwareVolume string) ([]govmmQemu.Device, string, error) {
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func (q *qemuAmd64) appendProtectionDevice(devices []govmmQemu.Device, firmware, firmwareVolume string) ([]govmmQemu.Device, string, error) {
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if q.sgxEPCSize != 0 {
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devices = append(devices,
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govmmQemu.Object{
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Type: govmmQemu.MemoryBackendEPC,
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ID: "epc0",
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Prealloc: true,
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Size: uint64(q.sgxEPCSize),
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})
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}
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switch q.protection {
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switch q.protection {
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case tdxProtection:
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case tdxProtection:
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id := q.devLoadersCount
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id := q.devLoadersCount
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