dragonball: Appease clippy introduced by 1.80.0

New clippy warnings show up after Rust Tool Chain bumped from 1.75.0 to
1.80.0, fix accrodingly.

Signed-off-by: Ruoqing He <heruoqing@iscas.ac.cn>

src/dragonball/src/dbs_address_space/src/region.rs

@@ -223,6 +223,7 @@ impl AddressSpaceRegion {
                     .read(true)
                     .write(true)
                     .create(true)
+                    .truncate(true)
                     .open(mem_file_path)
                     .map_err(AddressSpaceError::OpenFile)?;
                 nix::unistd::unlink(mem_file_path).map_err(AddressSpaceError::UnlinkFile)?;

src/dragonball/src/dbs_allocator/src/interval_tree.rs

@@ -93,7 +93,7 @@ impl Range {
     {
         let umin = u64::from(base);
         let umax = u64::from(size).checked_add(umin).unwrap();
-        if umin > umax || (umin == 0 && umax == std::u64::MAX) {
+        if umin > umax || (umin == 0 && umax == u64::MAX) {
             panic!("interval_tree: Range({}, {}) is invalid", umin, umax);
         }
         Range {
@@ -910,7 +910,7 @@ impl<T> IntervalTree<T> {
                 }
             }
         }
-        if range.max < std::u64::MAX {
+        if range.max < u64::MAX {
             if let Some((r, v)) = self.get_superset(&Range::new(range.max + 1, range.max + 1)) {
                 if v.is_free() {
                     range.max = r.max;

src/dragonball/src/dbs_arch/src/x86_64/cpuid/transformer/common.rs

@@ -119,6 +119,7 @@ pub fn update_extended_topology_entry(
 /// topology enumeration data. Software must detect the presence of CPUID leaf 1FH by verifying
 /// - the highest leaf index supported by CPUID is >= 1FH
 /// - CPUID.1FH:EBX[15:0] reports a non-zero value
+///
 /// If leaf_0x1f is not implemented in cpu used in host, guest OS should turn to leaf_0xb to
 /// determine the cpu topology.
 pub fn update_extended_topology_v2_entry(

src/dragonball/src/dbs_boot/src/x86_64/mptable.rs

@@ -133,8 +133,8 @@ const MPC_SPEC: i8 = 4;
 const MPC_OEM: [c_char; 8] = char_array!(c_char; 'A', 'L', 'I', 'C', 'L', 'O', 'U', 'D');
 const MPC_PRODUCT_ID: [c_char; 12] =
     char_array!(c_char; 'D', 'R', 'A', 'G', 'O', 'N', 'B', 'A', 'L', 'L', '1', '0');
-const BUS_TYPE_ISA: [u8; 6] = char_array!(u8; 'I', 'S', 'A', ' ', ' ', ' ');
+const BUS_TYPE_ISA: [u8; 6] = char_array!(u8; b'I', b'S', b'A', b' ', b' ', b' ');
-const BUS_TYPE_PCI: [u8; 6] = char_array!(u8; 'P', 'C', 'I', ' ', ' ', ' ');
+const BUS_TYPE_PCI: [u8; 6] = char_array!(u8; b'P', b'C', b'I', b' ', b' ', b' ');
 const IO_APIC_DEFAULT_PHYS_BASE: u32 = 0xfec0_0000; // source: linux/arch/x86/include/asm/apicdef.h
 const APIC_DEFAULT_PHYS_BASE: u32 = 0xfee0_0000; // source: linux/arch/x86/include/asm/apicdef.h
 

src/dragonball/src/dbs_device/src/lib.rs

@@ -107,7 +107,7 @@ impl TryFrom<IoSize> for PioSize {
 
     #[inline]
     fn try_from(size: IoSize) -> Result<Self, Self::Error> {
-        if size.raw_value() <= std::u16::MAX as u64 {
+        if size.raw_value() <= u16::MAX as u64 {
             Ok(PioSize(size.raw_value() as PioAddressType))
         } else {
             Err(size)
@@ -153,7 +153,7 @@ impl TryFrom<IoAddress> for PioAddress {
 
     #[inline]
     fn try_from(addr: IoAddress) -> Result<Self, Self::Error> {
-        if addr.0 <= std::u16::MAX as u64 {
+        if addr.0 <= u16::MAX as u64 {
             Ok(PioAddress(addr.raw_value() as PioAddressType))
         } else {
             Err(addr)

src/dragonball/src/dbs_pci/src/configuration.rs

@@ -1000,18 +1000,18 @@ impl PciConfiguration {
             .ok_or(Error::BarAddressInvalid(config.addr, config.size))?;
         match config.bar_type {
             PciBarRegionType::IoRegion => {
-                if config.size < 0x4 || config.size > u64::from(u32::max_value()) {
+                if config.size < 0x4 || config.size > u64::from(u32::MAX) {
                     return Err(Error::BarSizeInvalid(config.size));
                 }
-                if end_addr > u64::from(u32::max_value()) {
+                if end_addr > u64::from(u32::MAX) {
                     return Err(Error::BarAddressInvalid(config.addr, config.size));
                 }
             }
             PciBarRegionType::Memory32BitRegion => {
-                if config.size < 0x10 || config.size > u64::from(u32::max_value()) {
+                if config.size < 0x10 || config.size > u64::from(u32::MAX) {
                     return Err(Error::BarSizeInvalid(config.size));
                 }
-                if end_addr > u64::from(u32::max_value()) {
+                if end_addr > u64::from(u32::MAX) {
                     return Err(Error::BarAddressInvalid(config.addr, config.size));
                 }
             }
@@ -1022,9 +1022,6 @@ impl PciConfiguration {
                 if self.bar_used(config.bar_idx + 1) {
                     return Err(Error::BarInUse64(config.bar_idx));
                 }
-                if end_addr > u64::max_value() {
-                    return Err(Error::BarAddressInvalid(config.addr, config.size));
-                }
 
                 self.registers[reg_idx + 1] = (config.addr >> 32) as u32;
                 self.writable_bits[reg_idx + 1] = 0xffff_ffff;
@@ -1085,7 +1082,7 @@ impl PciConfiguration {
             .bitand(!(u64::from(!ROM_BAR_ADDR_MASK)))
             .checked_add(config.size - 1)
             .ok_or(Error::RomBarAddressInvalid(config.addr, config.size))?;
-        if end_addr > u64::from(u32::max_value()) {
+        if end_addr > u64::from(u32::MAX) {
             return Err(Error::RomBarAddressInvalid(config.addr, config.size));
         }
 

src/dragonball/src/dbs_utils/src/metric.rs

@@ -27,6 +27,7 @@
 //!   does to actual writing, so less synchronization effort is required.
 //! * We don't have to worry at all that much about losing some data if writing fails for a while
 //!   (this could be a concern, I guess).
+//!
 //! If if turns out this approach is not really what we want, it's pretty easy to resort to
 //! something else, while working behind the same interface.
 

src/dragonball/src/dbs_utils/src/net/tap.rs

@@ -306,7 +306,9 @@ mod tests {
         let addr_in = net_gen::sockaddr_in {
             sin_family: net_gen::AF_INET as u16,
             sin_port: 0,
-            sin_addr: unsafe { mem::transmute(ip_addr.octets()) },
+            sin_addr: unsafe {
+                mem::transmute::<[u8; 4], crate::net::net_gen::inn::in_addr>(ip_addr.octets())
+            },
             __pad: [0; 8usize],
         };
 

src/dragonball/src/dbs_virtio_devices/src/device.rs

@@ -340,9 +340,11 @@ pub trait VirtioRegionHandler: Send {
 /// - query device's resource requirement and allocate resources for it.
 /// - handle guest register access by forwarding requests to the device.
 /// - call activate()/reset() when the device is activated/reset by the guest.
+///
 /// The lifecycle of a virtio device is to be moved to a virtio transport, which will then query the
 /// device. Once the guest driver has configured the device, `VirtioDevice::activate` will be called
 /// and all the events, memory, and queues for device operation will be moved into the device.
+///
 /// Optionally, a virtio device can implement device reset in which it returns said resources and
 /// resets its internal.
 pub trait VirtioDevice<AS: GuestAddressSpace, Q: QueueT, R: GuestMemoryRegion>: Send {

src/dragonball/src/dbs_virtio_devices/src/fs/device.rs

@@ -883,7 +883,7 @@ where
         // Request for DAX window. The memory needs to be 2MiB aligned in order to support
         // hugepages, and needs to be above 4G to avoid confliction with lapic/ioapic devices.
         requests.push(ResourceConstraint::MmioAddress {
-            range: Some((0x1_0000_0000, std::u64::MAX)),
+            range: Some((0x1_0000_0000, u64::MAX)),
             align: 0x0020_0000,
             size: self.cache_size,
         });

src/dragonball/src/dbs_virtio_devices/src/mem.rs

@@ -56,7 +56,7 @@ pub const VIRTIO_MEM_DEFAULT_BLOCK_ALIGNMENT: u64 = 128 * 1024 * 1024;
 
 const VIRTIO_MEM_MAP_REGION_SHIFT: u64 = 31;
 const VIRTIO_MEM_MAP_REGION_SIZE: u64 = 1 << VIRTIO_MEM_MAP_REGION_SHIFT;
-const VIRTIO_MEM_MAP_REGION_MASK: u64 = !(std::u64::MAX << VIRTIO_MEM_MAP_REGION_SHIFT);
+const VIRTIO_MEM_MAP_REGION_MASK: u64 = !(u64::MAX << VIRTIO_MEM_MAP_REGION_SHIFT);
 
 /// Max memory block size used in guest kernel.
 const MAX_MEMORY_BLOCK_SIZE: u64 = 2 << 30;

src/dragonball/src/dbs_virtio_devices/src/mmio/mmio_v2.rs

@@ -34,9 +34,9 @@ const DEVICE_STATUS_DRIVER_OK: u32 = DEVICE_STATUS_FEATURE_OK | DEVICE_DRIVER_OK
 /// This requires 3 points of installation to work with a VM:
 ///
 /// 1. Mmio reads and writes must be sent to this device at what is referred to here as MMIO base.
-/// 1. `Mmio::queue_evts` must be installed at `MMIO_NOTIFY_REG_OFFSET` offset from the MMIO
+/// 2. `Mmio::queue_evts` must be installed at `MMIO_NOTIFY_REG_OFFSET` offset from the MMIO
 ///    base. Each event in the array must be signaled if the index is written at that offset.
-/// 1. `Mmio::interrupt_evt` must signal an interrupt that the guest driver is listening to when it
+/// 3. `Mmio::interrupt_evt` must signal an interrupt that the guest driver is listening to when it
 ///    is written to.
 ///
 /// Typically one page (4096 bytes) of MMIO address space is sufficient to handle this transport

src/dragonball/src/dbs_virtio_devices/src/net.rs

@@ -238,7 +238,7 @@ impl<AS: DbsGuestAddressSpace, Q: QueueT + Send, R: GuestMemoryRegion> NetEpollH
     // `frame_buf` should contain the frame bytes in a slice of exact length.
     // Returns whether MMDS consumed the frame.
     fn write_to_tap(frame_buf: &[u8], tap: &mut Tap, metrics: &Arc<NetDeviceMetrics>) {
-        match tap.write(frame_buf) {
+        match tap.write_all(frame_buf) {
             Ok(_) => {
                 metrics.tx_bytes_count.add(frame_buf.len());
                 metrics.tx_packets_count.inc();

src/dragonball/src/dbs_virtio_devices/src/vhost/vhost_user/block.rs

@@ -360,7 +360,7 @@ impl VhostUserBlockDevice {
             if !Path::new(self.vhost_socket.as_str()).exists() {
                 return Err(ActivateError::InternalError);
             }
-            let master = Master::connect(&String::from(self.vhost_socket.as_str()), 1)
+            let master = Master::connect(String::from(self.vhost_socket.as_str()), 1)
                 .map_err(VirtIoError::VhostError)?;
 
             self.endpoint.set_master(master);

src/dragonball/src/dbs_virtio_devices/src/vhost/vhost_user/fs.rs

@@ -669,7 +669,7 @@ where
         // Request for DAX window. The memory needs to be 2MiB aligned in order to support
         // huge pages, and needs to be above 4G to avoid conflicts with lapic/ioapic devices.
         requests.push(ResourceConstraint::MmioAddress {
-            range: Some((0x1_0000_0000, std::u64::MAX)),
+            range: Some((0x1_0000_0000, u64::MAX)),
             align: 0x0020_0000,
             size: device.cache_size,
         });

src/dragonball/src/dbs_virtio_devices/src/vsock/packet.rs

@@ -78,7 +78,7 @@ pub struct VsockPacketHdr {
     /// - VSOCK_OP_RW: a data packet;
     /// - VSOCK_OP_REQUEST: connection request;
     /// - VSOCK_OP_RST: forcefull connection termination;
-    /// etc (see `super::defs::uapi` for the full list).
+    /// - etc (see `super::defs::uapi` for the full list).
     pub op: u16,
     /// Additional options (flags) associated with the current operation (`op`).
     /// Currently, only used with shutdown requests (VSOCK_OP_SHUTDOWN).