From b4ed3294efe6b51b0a99458c8b1f65149299b492 Mon Sep 17 00:00:00 2001 From: Zvonko Kaiser Date: Mon, 13 Jul 2026 21:57:39 +0000 Subject: [PATCH] hypervisor/qemu: add Q35 vanilla kata fixture from production capture Adds fixture and ignored test (Phase 3) for the x86_64 kata use-case based on a production QEMU invocation from a DGX x86 host (2026-07-07): 65 vCPUs across two NUMA sockets, 73728M total, 36864M per socket pinned to host NUMA nodes via /dev/shm, 8 pcie-root-ports pre-provisioned on pcie.0 for GPU hotplug via QMP. Key architectural differences from the Grace/virt topology documented in ARCHITECTURE.md: - No kernel-irqchip on vanilla Q35 (only required for CoCo) - NUMA memory model: separate file-backed backends with host-nodes+policy rather than a single backend referenced on the -machine line - GPU passthrough via QMP hotplug onto pcie-root-ports, not static vfio-pci-nohotplug on pxb-pcie buses Phase 3 items needed before the test can pass: MemoryBackend::File { host_nodes, policy }, Objects::numa_distances, HostTopology NUMA SHM fields, Q35 branch in to_qemu_args. Also corrects the Platform Parity baseline for Q35 (no kernel-irqchip in vanilla; add note that it is only needed for CoCo). Signed-off-by: Zvonko Kaiser Assisted-by: Claude Sonnet 4.6 --- .../hypervisor/src/qemu/machine/tests.rs | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/src/runtime-rs/crates/hypervisor/src/qemu/machine/tests.rs b/src/runtime-rs/crates/hypervisor/src/qemu/machine/tests.rs index df4df47048..cbf6b24602 100644 --- a/src/runtime-rs/crates/hypervisor/src/qemu/machine/tests.rs +++ b/src/runtime-rs/crates/hypervisor/src/qemu/machine/tests.rs @@ -192,6 +192,28 @@ fn with_hugepages_preserves_egm_backends() { )); } +// ---- Q35 x86_64: vanilla kata, 2-socket NUMA, 8 pre-provisioned root ports ---- +// +// Production capture: DGX x86 host, 2026-07-07. 65 vCPUs, 73728M total, +// 36864M per socket pinned to host NUMA node via /dev/shm. 8 pcie-root-ports +// pre-provisioned on pcie.0 for GPU hotplug. +// +// Blocked on Phase 3: +// - Q35 machine in Platform::to_qemu_args (no gic-version, no highmem-mmio-size) +// - MemoryBackend::File { host_nodes, policy } fields for NUMA SHM pinning +// - Objects::numa_distances for -numa dist entries +// - HostTopology fields for NUMA node + SHM path per socket + +#[test] +#[ignore = "Phase 3: Q35 machine + NUMA SHM memory model not yet implemented"] +fn q35_vanilla_kata_x86() { + // HostTopology shape TBD in Phase 3. + // 2 sockets: socket 0 cpus 0-32 (host-node 0), socket 1 cpus 33-65 (host-node 1). + // No gpu_smmu_groups, no egm_sockets. + // 8 pre-provisioned root ports on pcie.0; NUMA distance 20 between the two nodes. + todo!("Phase 3") +} + // ---- Grace Config 1: single GPU, 1 SMMU, 9 NUMA nodes ---- #[test]