From e14eab084ebd967e0ff2321f5cd1b77b7632a8a4 Mon Sep 17 00:00:00 2001 From: Nitesh Konkar Date: Thu, 31 May 2018 18:53:37 +0530 Subject: [PATCH] runtime: Add testcases for ppc64le and arm64 Fixes #302 Signed-off-by: Nitesh Konkar niteshkonkar@in.ibm.com --- cli/kata-check_data_ppc64le_test.go | 114 ++++++++++++++++++++++++++++ virtcontainers/qemu_arm64_test.go | 52 +++++++++++++ virtcontainers/qemu_ppc64le_test.go | 52 +++++++++++++ 3 files changed, 218 insertions(+) create mode 100644 cli/kata-check_data_ppc64le_test.go create mode 100644 virtcontainers/qemu_arm64_test.go create mode 100644 virtcontainers/qemu_ppc64le_test.go diff --git a/cli/kata-check_data_ppc64le_test.go b/cli/kata-check_data_ppc64le_test.go new file mode 100644 index 0000000000..4b25b919a5 --- /dev/null +++ b/cli/kata-check_data_ppc64le_test.go @@ -0,0 +1,114 @@ +// Copyright (c) 2018 IBM +// +// SPDX-License-Identifier: Apache-2.0 +// + +package main + +const testCPUInfoTemplate = ` +processor : 0 +cpu : POWER8E (raw), altivec supported +clock : 3690.000000MHz +revision : 2.1 (pvr 004b 0201) + +processor : 8 +cpu : POWER8E (raw), altivec supported +clock : 3690.000000MHz +revision : 2.1 (pvr 004b 0201) + +processor : 16 +cpu : POWER8E (raw), altivec supported +clock : 2360.000000MHz +revision : 2.1 (pvr 004b 0201) + +processor : 24 +cpu : POWER8E (raw), altivec supported +clock : 2061.000000MHz +revision : 2.1 (pvr 004b 0201) + +processor : 32 +cpu : POWER8E (raw), altivec supported +clock : 3690.000000MHz +revision : 2.1 (pvr 004b 0201) + +processor : 40 +cpu : POWER8E (raw), altivec supported +clock : 3690.000000MHz +revision : 2.1 (pvr 004b 0201) + +processor : 48 +cpu : POWER8E (raw), altivec supported +clock : 3690.000000MHz +revision : 2.1 (pvr 004b 0201) + +processor : 56 +cpu : POWER8E (raw), altivec supported +clock : 3690.000000MHz +revision : 2.1 (pvr 004b 0201) + +processor : 64 +cpu : POWER8E (raw), altivec supported +clock : 3690.000000MHz +revision : 2.1 (pvr 004b 0201) + +processor : 72 +cpu : POWER8E (raw), altivec supported +clock : 3059.000000MHz +revision : 2.1 (pvr 004b 0201) + +processor : 80 +cpu : POWER8E (raw), altivec supported +clock : 2693.000000MHz +revision : 2.1 (pvr 004b 0201) + +processor : 88 +cpu : POWER8E (raw), altivec supported +clock : 2061.000000MHz +revision : 2.1 (pvr 004b 0201) + +processor : 96 +cpu : POWER8E (raw), altivec supported +clock : 3690.000000MHz +revision : 2.1 (pvr 004b 0201) + +processor : 104 +cpu : POWER8E (raw), altivec supported +clock : 2061.000000MHz +revision : 2.1 (pvr 004b 0201) + +processor : 112 +cpu : POWER8E (raw), altivec supported +clock : 2061.000000MHz +revision : 2.1 (pvr 004b 0201) + +processor : 120 +cpu : POWER8E (raw), altivec supported +clock : 2061.000000MHz +revision : 2.1 (pvr 004b 0201) + +processor : 128 +cpu : POWER8E (raw), altivec supported +clock : 3690.000000MHz +revision : 2.1 (pvr 004b 0201) + +processor : 136 +cpu : POWER8E (raw), altivec supported +clock : 2061.000000MHz +revision : 2.1 (pvr 004b 0201) + +processor : 144 +cpu : POWER8E (raw), altivec supported +clock : 2294.000000MHz +revision : 2.1 (pvr 004b 0201) + +processor : 152 +cpu : POWER8E (raw), altivec supported +clock : 2560.000000MHz +revision : 2.1 (pvr 004b 0201) + +timebase : 512000000 +platform : PowerNV +model : 8247-22L +machine : PowerNV 8247-22L +firmware : OPAL v3 +` diff --git a/virtcontainers/qemu_arm64_test.go b/virtcontainers/qemu_arm64_test.go new file mode 100644 index 0000000000..17aaa5f7a3 --- /dev/null +++ b/virtcontainers/qemu_arm64_test.go @@ -0,0 +1,52 @@ +// Copyright (c) 2018 IBM +// +// SPDX-License-Identifier: Apache-2.0 +// + +package virtcontainers + +import ( + "fmt" + "testing" + + govmmQemu "github.com/intel/govmm/qemu" + "github.com/stretchr/testify/assert" +) + +func newTestQemu(machineType string) qemuArch { + config := HypervisorConfig{ + HypervisorMachineType: machineType, + } + return newQemuArch(config) +} + +func TestQemuArm64CPUModel(t *testing.T) { + assert := assert.New(t) + arm64 := newTestQemu(virt) + + expectedOut := defaultCPUModel + model := arm64.cpuModel() + assert.Equal(expectedOut, model) + + arm64.enableNestingChecks() + expectedOut = defaultCPUModel + ",pmu=off" + model = arm64.cpuModel() + assert.Equal(expectedOut, model) +} + +func TestQemuArm64MemoryTopology(t *testing.T) { + assert := assert.New(t) + arm64 := newTestQemu(virt) + memoryOffset := 1024 + + hostMem := uint64(1024) + mem := uint64(120) + expectedMemory := govmmQemu.Memory{ + Size: fmt.Sprintf("%dM", mem), + Slots: defaultMemSlots, + MaxMem: fmt.Sprintf("%dM", hostMem+uint64(memoryOffset)), + } + + m := arm64.memoryTopology(mem, hostMem) + assert.Equal(expectedMemory, m) +} diff --git a/virtcontainers/qemu_ppc64le_test.go b/virtcontainers/qemu_ppc64le_test.go new file mode 100644 index 0000000000..22752b2c7c --- /dev/null +++ b/virtcontainers/qemu_ppc64le_test.go @@ -0,0 +1,52 @@ +// Copyright (c) 2018 IBM +// +// SPDX-License-Identifier: Apache-2.0 +// + +package virtcontainers + +import ( + "fmt" + "testing" + + govmmQemu "github.com/intel/govmm/qemu" + "github.com/stretchr/testify/assert" +) + +func newTestQemu(machineType string) qemuArch { + config := HypervisorConfig{ + HypervisorMachineType: machineType, + } + return newQemuArch(config) +} + +func TestQemuPPC64leCPUModel(t *testing.T) { + assert := assert.New(t) + ppc64le := newTestQemu(QemuPseries) + + expectedOut := defaultCPUModel + model := ppc64le.cpuModel() + assert.Equal(expectedOut, model) + + ppc64le.enableNestingChecks() + expectedOut = defaultCPUModel + ",pmu=off" + model = ppc64le.cpuModel() + assert.Equal(expectedOut, model) +} + +func TestQemuPPC64leMemoryTopology(t *testing.T) { + assert := assert.New(t) + ppc64le := newTestQemu(QemuPseries) + memoryOffset := 1024 + + hostMem := uint64(1024) + mem := uint64(120) + expectedMemory := govmmQemu.Memory{ + Size: fmt.Sprintf("%dM", mem), + Slots: defaultMemSlots, + MaxMem: fmt.Sprintf("%dM", hostMem+uint64(memoryOffset)), + } + + m := ppc64le.memoryTopology(mem, hostMem) + assert.Equal(expectedMemory, m) +}