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Initially enable vcpu hotplug in qemu for arm base on Salli's work[1]. Fixes:#3280 Signed-off-by: Huang Shijie <shijie8@gmail.com> [1] https://github.com/salil-mehta/qemu/tree/virt-cpuhp-armv8/rfc-v1
140 lines
5.6 KiB
Diff
140 lines
5.6 KiB
Diff
From f7b9c727b0da0bec444d85bd1bf7bd5bfb9d3e4f Mon Sep 17 00:00:00 2001
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From: Salil Mehta <salil.mehta@huawei.com>
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Date: Thu, 25 Nov 2021 16:54:49 +0800
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Subject: [PATCH 10/28] arm/cpuhp: Update CPUs AML with cpu-(ctrl)dev change
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CPUs Control device(\\_SB.PCI0) register interface for the x86 arch is based on
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PCI and is IO port based and hence existing cpus AML code assumes _CRS objects
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would evaluate to a system resource which describes IO Port address. But on ARM
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arch CPUs control device(\\_SB.PRES) register interface is memory-mapped hence
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_CRS object should evaluate to system resource which describes memory-mapped
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base address.
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This cpus AML code change updates the existing inerface of the build cpus AML
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function to accept both IO/MEMORY type regions and update the _CRS object
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correspondingly.
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NOTE: Beside above CPU scan shall be triggered when OSPM evaluates _EVT method
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part of the GED framework which is covered in subsequent patch.
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Co-developed-by: Keqian Zhu <zhukeqian1@huawei.com>
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Signed-off-by: Salil Mehta <salil.mehta@huawei.com>
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Signed-off-by: Huang Shijie <shijie8@gmail.com>
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---
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hw/acpi/cpu.c | 23 +++++++++++++++--------
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hw/arm/virt-acpi-build.c | 13 ++++++++++++-
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hw/i386/acpi-build.c | 2 +-
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include/hw/acpi/cpu.h | 5 +++--
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4 files changed, 31 insertions(+), 12 deletions(-)
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diff --git a/hw/acpi/cpu.c b/hw/acpi/cpu.c
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index cf07a6c30c..98657ad28b 100644
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--- a/hw/acpi/cpu.c
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+++ b/hw/acpi/cpu.c
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@@ -345,9 +345,10 @@ const VMStateDescription vmstate_cpu_hotplug = {
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#define CPU_FW_EJECT_EVENT "CEJF"
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void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
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- hwaddr io_base,
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+ hwaddr mmap_io_base,
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const char *res_root,
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- const char *event_handler_method)
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+ const char *event_handler_method,
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+ AmlRegionSpace rs)
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{
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Aml *ifctx;
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Aml *field;
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@@ -375,13 +376,18 @@ void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
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aml_append(cpu_ctrl_dev, aml_mutex(CPU_LOCK, 0));
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crs = aml_resource_template();
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- aml_append(crs, aml_io(AML_DECODE16, io_base, io_base, 1,
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+ if (rs == AML_SYSTEM_IO) {
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+ aml_append(crs, aml_io(AML_DECODE16, mmap_io_base, mmap_io_base, 1,
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ACPI_CPU_HOTPLUG_REG_LEN));
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+ } else {
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+ aml_append(crs, aml_memory32_fixed(mmap_io_base,
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+ ACPI_CPU_HOTPLUG_REG_LEN, AML_READ_WRITE));
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+ }
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aml_append(cpu_ctrl_dev, aml_name_decl("_CRS", crs));
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/* declare CPU hotplug MMIO region with related access fields */
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aml_append(cpu_ctrl_dev,
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- aml_operation_region("PRST", AML_SYSTEM_IO, aml_int(io_base),
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+ aml_operation_region("PRST", rs, aml_int(mmap_io_base),
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ACPI_CPU_HOTPLUG_REG_LEN));
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field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK,
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@@ -720,9 +726,10 @@ void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
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aml_append(sb_scope, cpus_dev);
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aml_append(table, sb_scope);
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- method = aml_method(event_handler_method, 0, AML_NOTSERIALIZED);
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- aml_append(method, aml_call0("\\_SB.CPUS." CPU_SCAN_METHOD));
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- aml_append(table, method);
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-
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+ if (event_handler_method) {
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+ method = aml_method(event_handler_method, 0, AML_NOTSERIALIZED);
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+ aml_append(method, aml_call0("\\_SB.CPUS." CPU_SCAN_METHOD));
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+ aml_append(table, method);
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+ }
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g_free(cphp_res_path);
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}
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diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
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index 037cc1fd82..95a3c3b31b 100644
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--- a/hw/arm/virt-acpi-build.c
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+++ b/hw/arm/virt-acpi-build.c
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@@ -703,7 +703,18 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
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* the RTC ACPI device at all when using UEFI.
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*/
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scope = aml_scope("\\_SB");
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- acpi_dsdt_add_cpus(scope, vms);
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+ /* if GED is enabled then cpus AML shall be added as part build_cpus_aml */
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+ if (vms->acpi_dev) {
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+ CPUHotplugFeatures opts = {
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+ .acpi_1_compatible = false,
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+ .has_legacy_cphp = false
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+ };
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+
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+ build_cpus_aml(scope, ms, opts, memmap[VIRT_CPUHP_ACPI].base,
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+ "\\_SB", NULL, AML_SYSTEM_MEMORY);
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+ } else {
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+ acpi_dsdt_add_cpus(scope, vms);
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+ }
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acpi_dsdt_add_uart(scope, &memmap[VIRT_UART],
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(irqmap[VIRT_UART] + ARM_SPI_BASE));
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if (vmc->acpi_expose_flash) {
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diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
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index a33ac8b91e..fa7a5ed79d 100644
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--- a/hw/i386/acpi-build.c
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+++ b/hw/i386/acpi-build.c
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@@ -1503,7 +1503,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
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.fw_unplugs_cpu = pm->smi_on_cpu_unplug,
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};
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build_cpus_aml(dsdt, machine, opts, pm->cpu_hp_io_base,
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- "\\_SB.PCI0", "\\_GPE._E02");
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+ "\\_SB.PCI0", "\\_GPE._E02", AML_SYSTEM_IO);
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}
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if (pcms->memhp_io_base && nr_mem) {
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diff --git a/include/hw/acpi/cpu.h b/include/hw/acpi/cpu.h
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index 999caaf510..ead8f1d1cc 100644
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--- a/include/hw/acpi/cpu.h
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+++ b/include/hw/acpi/cpu.h
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@@ -56,9 +56,10 @@ typedef struct CPUHotplugFeatures {
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} CPUHotplugFeatures;
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void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
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- hwaddr io_base,
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+ hwaddr mmap_io_base,
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const char *res_root,
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- const char *event_handler_method);
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+ const char *event_handler_method,
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+ AmlRegionSpace rs);
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void acpi_cpu_ospm_status(CPUHotplugState *cpu_st, ACPIOSTInfoList ***list);
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--
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2.30.2
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