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Remove Makefile undefined variables logic
It didn't do what I thought it did and was just noise. Specifically, it only kicks in for recursive `make` invocations.
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18
Makefile
18
Makefile
@@ -36,9 +36,6 @@ SHELL := /bin/bash
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MAKEFLAGS += --no-builtin-rules
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.SUFFIXES:
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# We want make to yell at us if we use undefined variables.
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MAKEFLAGS += --warn-undefined-variables
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# Constants used throughout.
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OUT_DIR ?= _output
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BIN_DIR := $(OUT_DIR)/bin
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@@ -47,20 +44,9 @@ PRJ_SRC_PATH := k8s.io/kubernetes
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# Metadata for driving the build lives here.
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META_DIR := .make
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#
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# Define variables that we use as inputs so we can warn about undefined variables.
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#
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export KUBE_GOFLAGS := $(GOFLAGS)
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WHAT ?=
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TESTS ?=
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GOFLAGS ?=
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KUBE_GOFLAGS = $(GOFLAGS)
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export KUBE_GOFLAGS GOFLAGS
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GOLDFLAGS ?=
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KUBE_GOLDFLAGS = $(GOLDFLAGS)
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export KUBE_GOLDFLAGS GOLDFLAGS
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export KUBE_GOLDFLAGS := $(GOLDFLAGS)
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# Build code.
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#
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