From 3fe3225b1fc9564da357d2a002d9ff93b13e4a45 Mon Sep 17 00:00:00 2001 From: Matt Harvey Date: Mon, 23 Aug 2021 22:32:58 +0000 Subject: [PATCH] Revert "Revert "Enables UART tx_watermark interrupts"" This reverts commit 342e260470ba0c194c7f7a0d1006b2f3a2432236. Reason for revert: adding to same topic as a sim.mk change that runs the same Renode.exe built by "m renode" Change-Id: I4ad8715e09ec3c0bf56939706a19db9085f806bb GitOrigin-RevId: 31b22501c04e525394bc43406affb1c4d4829c1f --- .../system/components/OpenTitanUARTDriver/src/driver.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/apps/system/components/OpenTitanUARTDriver/src/driver.c b/apps/system/components/OpenTitanUARTDriver/src/driver.c index ff114b6..d921391 100644 --- a/apps/system/components/OpenTitanUARTDriver/src/driver.c +++ b/apps/system/components/OpenTitanUARTDriver/src/driver.c @@ -163,12 +163,7 @@ void pre_init() { // Enables interrupts. REG(INTR_ENABLE) = ( - // TODO(mattharvey): Enable tx_watermark. Currently the handler fires - // repeatedly in a loop when doing this, even while the TX FIFO remains - // empty, contrary to the "edge triggered events" working in the OpenTitan - // docs. Check that Renode is doing the right thing and if so debug after - // re-enabling this. - // BIT(UART_INTR_COMMON_TX_WATERMARK) | + BIT(UART_INTR_COMMON_TX_WATERMARK) | BIT(UART_INTR_COMMON_RX_WATERMARK) | BIT(UART_INTR_COMMON_TX_EMPTY)); } @@ -239,9 +234,6 @@ void tx_update(uint32_t num_valid_dataport_bytes) { // These happen when the transmit FIFO is half-empty. This refills the FIFO to // prevent stalling, stopping early if tx_buf becomes empty, and then signals // any tx_update that might be waiting for tx_buf to not be full. -// -// Currently this is not actually enabled. See the TODO in the implementation of -// pre_init. void tx_watermark_handle(void) { fill_tx_fifo();