From b35f77a2fedc7fbf98b8ae70af54049d519788cd Mon Sep 17 00:00:00 2001 From: Matt Harvey Date: Thu, 19 Aug 2021 19:36:37 -0700 Subject: [PATCH] Enables UART tx_watermark interrupts With Renode at HEAD, this causes an infinite loop. It seems like the Renode OpenTitan UART does not have "edge triggered" behavior. Change-Id: Ic553ce34cabaf8287c7969904d6336d1acf339a0 GitOrigin-RevId: 010f0d7045d40ea6b0900fc74d79fe92df0fae69 --- .../system/components/OpenTitanUARTDriver/src/driver.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/apps/system/components/OpenTitanUARTDriver/src/driver.c b/apps/system/components/OpenTitanUARTDriver/src/driver.c index ff114b6..d921391 100644 --- a/apps/system/components/OpenTitanUARTDriver/src/driver.c +++ b/apps/system/components/OpenTitanUARTDriver/src/driver.c @@ -163,12 +163,7 @@ void pre_init() { // Enables interrupts. REG(INTR_ENABLE) = ( - // TODO(mattharvey): Enable tx_watermark. Currently the handler fires - // repeatedly in a loop when doing this, even while the TX FIFO remains - // empty, contrary to the "edge triggered events" working in the OpenTitan - // docs. Check that Renode is doing the right thing and if so debug after - // re-enabling this. - // BIT(UART_INTR_COMMON_TX_WATERMARK) | + BIT(UART_INTR_COMMON_TX_WATERMARK) | BIT(UART_INTR_COMMON_RX_WATERMARK) | BIT(UART_INTR_COMMON_TX_EMPTY)); } @@ -239,9 +234,6 @@ void tx_update(uint32_t num_valid_dataport_bytes) { // These happen when the transmit FIFO is half-empty. This refills the FIFO to // prevent stalling, stopping early if tx_buf becomes empty, and then signals // any tx_update that might be waiting for tx_buf to not be full. -// -// Currently this is not actually enabled. See the TODO in the implementation of -// pre_init. void tx_watermark_handle(void) { fill_tx_fifo();