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sel4-sys: merge more stuff from capdl
Change-Id: If7a7b4ab4e6fee1d0df3fd5f6e84ccdfaca6275b GitOrigin-RevId: 2db9e128e347c19030d280141949e4831681e6c7
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@ -77,6 +77,11 @@ pub enum seL4_RISCV_VMAttributes {
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ExecuteNever = 0x1,
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Default_VMAttributes = 0,
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}
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impl From<u32> for seL4_RISCV_VMAttributes {
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fn from(val: u32) -> seL4_RISCV_VMAttributes {
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unsafe { ::core::mem::transmute(val & 1) }
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}
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}
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#[repr(C)]
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#[derive(Debug, Clone, Copy, PartialEq, Eq)]
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@ -17,8 +17,10 @@ fn main() {
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let out_dir = env::var("OUT_DIR").unwrap();
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let cargo_target_arch = env::var("CARGO_CFG_TARGET_ARCH").unwrap();
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let cargo_target_pointer_width = env::var("CARGO_CFG_TARGET_POINTER_WIDTH").unwrap();
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println!("target_arch = {} target_pointer_width = {}",
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cargo_target_arch, cargo_target_pointer_width);
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println!(
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"target_arch = {} target_pointer_width = {}",
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cargo_target_arch, cargo_target_pointer_width
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);
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// Default to python3 (maybe necessary for code divergence)
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let python_bin = env::var("PYTHON").unwrap_or_else(|_| "python3".to_string());
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@ -31,16 +33,20 @@ fn main() {
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// to select the target architecture;
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// NB: this mimics the logic in lib.rs
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let (arch, archdir) = match cargo_target_arch.as_str() {
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"x86" => ("ia32", "x86"),
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"x86_64" => ("x86_64", "x86"),
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"x86" => ("ia32", "x86"),
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"x86_64" => ("x86_64", "x86"),
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"arm" => match cargo_target_pointer_width.as_str() {
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"32" => ("aarch32", "arm"),
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"64" => ("aarch64", "arm"),
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_ => { panic!("Unsupported arm word size {}", cargo_target_pointer_width); }
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}
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_ => {
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panic!("Unsupported arm word size {}", cargo_target_pointer_width);
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}
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},
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"riscv32" => ("riscv32", "riscv"),
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"riscv64" => ("riscv64", "riscv"),
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_ => { panic!("Unsupported architecture {}", cargo_target_arch); }
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_ => {
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panic!("Unsupported architecture {}", cargo_target_arch);
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}
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};
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let xml_interfaces_file = format!("{}/libsel4/include/interfaces/sel4.xml", sel4_dir);
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@ -116,7 +122,11 @@ fn main() {
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))
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.unwrap();
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println!("{}/types{}.rs", out_dir, cargo_target_pointer_width);
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let bfout = File::create(&*format!("{}/types{}.rs", out_dir, cargo_target_pointer_width)).unwrap();
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let bfout = File::create(&*format!(
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"{}/types{}.rs",
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out_dir, cargo_target_pointer_width
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))
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.unwrap();
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let mut cmd = Command::new("/usr/bin/env");
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cmd.arg(&python_bin)
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.arg("tools/bitfield_gen.py")
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@ -132,18 +132,17 @@ include!(concat!(env!("OUT_DIR"), "/syscalls.rs"));
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// Well-known types from libsel4/include/sel4/types.h
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pub type seL4_CNode = seL4_CPtr;
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pub type seL4_Domain = seL4_Word;
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pub type seL4_DomainSet = seL4_CPtr;
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pub type seL4_IRQControl = seL4_CPtr;
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pub type seL4_IRQHandler = seL4_CPtr;
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pub type seL4_NodeId = seL4_Word;
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pub type seL4_PAddr = seL4_Word;
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pub type seL4_Domain = seL4_Word;
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pub type seL4_CNode = seL4_CPtr;
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pub type seL4_IRQHandler = seL4_CPtr;
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pub type seL4_IRQControl = seL4_CPtr;
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pub type seL4_TCB = seL4_CPtr;
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pub type seL4_Untyped = seL4_CPtr;
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pub type seL4_DomainSet = seL4_CPtr;
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pub type seL4_SchedContext = seL4_CPtr;
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pub type seL4_SchedControl = seL4_CPtr;
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pub type seL4_TCB = seL4_CPtr;
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pub type seL4_Untyped = seL4_CPtr;
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// TODO(sleffler): seL4 uses seL4_Uint64 but it's not defined for us
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pub type seL4_Time = u64;
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@ -154,7 +153,7 @@ pub const seL4_MsgExtraCapBits: usize = 2;
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pub const seL4_MsgMaxExtraCaps: usize = (1usize << seL4_MsgExtraCapBits) - 1;
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// Syscall stubs are generated to return seL4_Result unless they return
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// an APi struct with an embedded error code. The latter should be replaced
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// an API struct with an embedded error code. The latter should be replaced
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// too but for now we leave it as-is.
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pub type seL4_Result = Result<(), seL4_Error>;
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@ -210,6 +209,19 @@ impl ::core::clone::Clone for seL4_IPCBuffer {
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}
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}
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// From libsel4/include/sel4/shared_types.h; this is defined in C as an enum
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// but we use pub const because the C code intentionally declares overlapping
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// values which Rust rejects. Nothing (atm) uses the actual enum type so this
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// should be compatible.
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pub const seL4_CapFault_IP: seL4_Word = 0;
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pub const seL4_CapFault_Addr: seL4_Word = 1;
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pub const seL4_CapFault_InRecvPhase: seL4_Word = 2;
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pub const seL4_CapFault_LookupFailureType: seL4_Word = 3;
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pub const seL4_CapFault_BitsLeft: seL4_Word = 4;
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pub const seL4_CapFault_DepthMismatch_BitsFound: seL4_Word = 5;
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pub const seL4_CapFault_GuardMismatch_GuardFound: seL4_Word = seL4_CapFault_DepthMismatch_BitsFound;
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pub const seL4_CapFault_GuardMismatch_BitsFound: seL4_Word = 6;
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// Bootinfo
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// Fixed cap slots for root thread.
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