github/acrn-hypervisor
1
0
Fork 0
mirror of https://github.com/projectacrn/acrn-hypervisor.git synced 2025-09-15 22:09:06 +00:00
Code Issues Projects Releases Wiki Activity

HV: save the cs limit field for SOS

Browse Source 
Save the native cs limit and reuse it for SOS cs limit. To remove
the hardcode of cs limit for guest in hypervisor.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
This commit is contained in:
Yin Fengwei
2018-10-29 16:50:57 +08:00
committed by lijinxia
parent 6993fdb3e9
commit 0cd85749fe
3 changed files with 18 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
hypervisor/arch/x86/cpu_save_boot_ctx.S
View File

@@ -32,6 +32,13 @@ cpu_primary_save_32:
/* Clear Limit field, bit 8-11 */
andl $0x0000f0ff, %ecx
mov %ecx, BOOT_CTX_CS_AR_OFFSET(%eax)
/* Save CS limit field */
mov %cs, %cx
xor %edx, %edx
lsl %ecx, %edx
mov %edx, BOOT_CTX_CS_LIMIT_OFFSET(%eax)
mov %es, BOOT_CTX_ES_SEL_OFFSET(%eax)
mov %ss, BOOT_CTX_SS_SEL_OFFSET(%eax)
mov %ds, BOOT_CTX_DS_SEL_OFFSET(%eax)
@@ -62,6 +69,13 @@ cpu_primary_save_64:
/* Clear Limit field, bit 8-11 */
andl $0x0000f0ff, %ecx
mov %ecx, BOOT_CTX_CS_AR_OFFSET(%r8)
/* Save CS limit field */
mov %cs, %cx
xor %edx, %edx
lsl %ecx, %edx
mov %edx, BOOT_CTX_CS_LIMIT_OFFSET(%r8)
mov %es, BOOT_CTX_ES_SEL_OFFSET(%r8)
mov %ss, BOOT_CTX_SS_SEL_OFFSET(%r8)
mov %ds, BOOT_CTX_DS_SEL_OFFSET(%r8)