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hv: emulate IA32_FEATURE_CONTROL MSR

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All features controlled by IA32_FEATURE_CONTROL are disabled from guests,
so set the Lock bit to prevent it from writing by guests.

Also hide the MSR_IA32_FEATURE_CONTROL_VMX_NO_SMX bit from guest.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Zide Chen 2019-01-09 10:30:06 -08:00 committed by acrnsi
parent d5b578fd84
commit 10db11b00a
2 changed files with 13 additions and 2 deletions
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13
hypervisor/arch/x86/guest/vmsr.c
View File

@ -32,7 +32,8 @@ static const uint32_t emulated_guest_msrs[NUM_GUEST_MSRS] = {
MSR_IA32_BIOS_SIGN_ID,
MSR_IA32_TIME_STAMP_COUNTER,
MSR_IA32_APIC_BASE,
MSR_IA32_PERF_CTL
MSR_IA32_PERF_CTL,
MSR_IA32_FEATURE_CONTROL,
};
#define NUM_MTRR_MSRS 13U
@ -424,6 +425,11 @@ int32_t rdmsr_vmexit_handler(struct acrn_vcpu *vcpu)
err = vlapic_rdmsr(vcpu, msr, &v);
break;
}
case MSR_IA32_FEATURE_CONTROL:
{
v = MSR_IA32_FEATURE_CONTROL_LOCK;
break;
}
default:
{
if (is_x2apic_msr(msr)) {
@ -570,6 +576,11 @@ int32_t wrmsr_vmexit_handler(struct acrn_vcpu *vcpu)
err = vlapic_wrmsr(vcpu, msr, v);
break;
}
case MSR_IA32_FEATURE_CONTROL:
{
err = -EACCES;
break;
}
default:
{
if (is_x2apic_msr(msr)) {

2
hypervisor/include/arch/x86/guest/vcpu.h
View File

@ -166,7 +166,7 @@ struct ext_context {
#define SECURE_WORLD 1
#define NUM_WORLD_MSRS 2U
#define NUM_COMMON_MSRS 6U
#define NUM_COMMON_MSRS 7U
#define NUM_GUEST_MSRS (NUM_WORLD_MSRS + NUM_COMMON_MSRS)
struct event_injection_info {