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hv: emulate IA32_FEATURE_CONTROL MSR
All features controlled by IA32_FEATURE_CONTROL are disabled from guests, so set the Lock bit to prevent it from writing by guests. Also hide the MSR_IA32_FEATURE_CONTROL_VMX_NO_SMX bit from guest. Tracked-On: #1867 Signed-off-by: Zide Chen <zide.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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@ -32,7 +32,8 @@ static const uint32_t emulated_guest_msrs[NUM_GUEST_MSRS] = {
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MSR_IA32_BIOS_SIGN_ID,
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MSR_IA32_TIME_STAMP_COUNTER,
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MSR_IA32_APIC_BASE,
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MSR_IA32_PERF_CTL
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MSR_IA32_PERF_CTL,
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MSR_IA32_FEATURE_CONTROL,
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};
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#define NUM_MTRR_MSRS 13U
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@ -424,6 +425,11 @@ int32_t rdmsr_vmexit_handler(struct acrn_vcpu *vcpu)
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err = vlapic_rdmsr(vcpu, msr, &v);
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break;
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}
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case MSR_IA32_FEATURE_CONTROL:
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{
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v = MSR_IA32_FEATURE_CONTROL_LOCK;
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break;
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}
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default:
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{
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if (is_x2apic_msr(msr)) {
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@ -570,6 +576,11 @@ int32_t wrmsr_vmexit_handler(struct acrn_vcpu *vcpu)
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err = vlapic_wrmsr(vcpu, msr, v);
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break;
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}
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case MSR_IA32_FEATURE_CONTROL:
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{
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err = -EACCES;
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break;
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}
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default:
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{
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if (is_x2apic_msr(msr)) {
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@ -166,7 +166,7 @@ struct ext_context {
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#define SECURE_WORLD 1
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#define NUM_WORLD_MSRS 2U
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#define NUM_COMMON_MSRS 6U
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#define NUM_COMMON_MSRS 7U
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#define NUM_GUEST_MSRS (NUM_WORLD_MSRS + NUM_COMMON_MSRS)
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struct event_injection_info {
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