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hv:enable gpu iommu except APL platforms

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To enable gvt-d,need to allow the GPU IOMMU.
While gvt-d hasn't been enabled on APL yet,
so let APL disable GPU IOMMU.

v2 -> v3:
        * let APL platforms disable GPU IOMMU.

Tracked-On: #4405

Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Wu Binbin <binbin.wu@intel.com>
This commit is contained in:
Junming Liu 2020-02-15 16:33:07 +00:00 committed by wenlingz
parent 1f1eb7fdba
commit 1303861d26
3 changed files with 21 additions and 5 deletions
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4
hypervisor/acpi_parser/dmar_parse.c
View File

@ -8,6 +8,7 @@
#include <logmsg.h>
#include <io.h>
#include <spinlock.h>
#include <cpu_caps.h>
#include "pci.h"
#include "vtd.h"
#include "acpi.h"
@ -204,12 +205,15 @@ handle_one_drhd(struct acpi_dmar_hardware_unit *acpi_drhd,
consumed = handle_dmar_devscope(dev_scope, cp, remaining);
/* Disable GPU IOMMU due to gvt-d hasn’t been enabled on APL yet. */
if (is_apl_platform()) {
if (((drhd->segment << 16U) |
(dev_scope->bus << 8U) |
dev_scope->devfun) == CONFIG_GPU_SBDF) {
ASSERT(dev_count == 1, "no dedicated iommu for gpu");
drhd->ignore = true;
}
}
if (consumed <= 0)
break;

11
hypervisor/arch/x86/cpu_caps.c
View File

@ -113,6 +113,17 @@ static bool is_ctrl_setting_allowed(uint64_t msr_val, uint32_t ctrl)
return ((((uint32_t)(msr_val >> 32UL)) & ctrl) == ctrl);
}
bool is_apl_platform(void)
{
bool ret = false;
if ((boot_cpu_data.family == 0x6U) && (boot_cpu_data.model == 0x92U)) {
ret = true;
}
return ret;
}
static void detect_ept_cap(void)
{
uint64_t msr_val;

1
hypervisor/include/arch/x86/cpu_caps.h
View File

@ -48,6 +48,7 @@ bool is_apicv_advanced_feature_supported(void);
bool pcpu_has_cap(uint32_t bit);
bool pcpu_has_vmx_ept_cap(uint32_t bit_mask);
bool pcpu_has_vmx_vpid_cap(uint32_t bit_mask);
bool is_apl_platform(void);
void init_pcpu_capabilities(void);
void init_pcpu_model_name(void);
int32_t detect_hardware_support(void);