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https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-09-04 18:30:18 +00:00
HV: HV: make io_read_fn_t return true or false
This patch makes io_read_fn_t return true or false instead of void. Returning true means that the handler in HV process the request completely. Returning false means that we need to re-inject the request to DM after processing it in HV. Tracked-On: #2865 Signed-off-by: Kaige Fu <kaige.fu@intel.com>
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ACRN System Integration
parent
3b2ad67788
commit
1c0d7f78d0
@@ -43,13 +43,14 @@ static void pci_cfg_clear_cache(struct pci_addr_info *pi)
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}
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/**
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* @pre vm != NULL
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* @pre vm != NULL && vcpu != NULL
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*/
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static uint32_t pci_cfgaddr_io_read(struct acrn_vm *vm, uint16_t addr, size_t bytes)
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static bool pci_cfgaddr_io_read(struct acrn_vm *vm, struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes)
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{
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uint32_t val = ~0U;
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struct acrn_vpci *vpci = &vm->vpci;
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struct pci_addr_info *pi = &vpci->addr_info;
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struct pio_request *pio_req = &vcpu->req.reqs.pio;
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if ((addr == (uint16_t)PCI_CONFIG_ADDR) && (bytes == 4U)) {
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val = (uint32_t)pi->cached_bdf.value;
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@@ -60,7 +61,9 @@ static uint32_t pci_cfgaddr_io_read(struct acrn_vm *vm, uint16_t addr, size_t by
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}
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}
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return val;
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pio_req->value = val;
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return true;
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}
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/**
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@@ -96,17 +99,18 @@ static inline bool vpci_is_valid_access(uint32_t offset, uint32_t bytes)
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}
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/**
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* @pre vm != NULL
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* @pre vm != NULL && vcpu != NULL
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* @pre vm->vm_id < CONFIG_MAX_VM_NUM
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* @pre (get_vm_config(vm->vm_id)->type == PRE_LAUNCHED_VM) || (get_vm_config(vm->vm_id)->type == SOS_VM)
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*/
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static uint32_t pci_cfgdata_io_read(struct acrn_vm *vm, uint16_t addr, size_t bytes)
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static bool pci_cfgdata_io_read(struct acrn_vm *vm, struct acrn_vcpu *vcpu, uint16_t addr, size_t bytes)
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{
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struct acrn_vpci *vpci = &vm->vpci;
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struct pci_addr_info *pi = &vpci->addr_info;
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uint16_t offset = addr - PCI_CONFIG_DATA;
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uint32_t val = ~0U;
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struct acrn_vm_config *vm_config;
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struct pio_request *pio_req = &vcpu->req.reqs.pio;
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if (pi->cached_enable) {
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if (vpci_is_valid_access(pi->cached_reg + offset, bytes)) {
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@@ -129,7 +133,9 @@ static uint32_t pci_cfgdata_io_read(struct acrn_vm *vm, uint16_t addr, size_t by
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pci_cfg_clear_cache(pi);
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}
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return val;
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pio_req->value = val;
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return true;
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}
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/**
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@@ -728,15 +728,16 @@ static int32_t vpic_master_handler(struct acrn_vm *vm, bool in, uint16_t port,
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return ret;
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}
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static uint32_t vpic_master_io_read(struct acrn_vm *vm, uint16_t addr, size_t width)
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static bool vpic_master_io_read(struct acrn_vm *vm, struct acrn_vcpu *vcpu, uint16_t addr, size_t width)
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{
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uint32_t val = 0U;
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struct pio_request *pio_req = &vcpu->req.reqs.pio;
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if (vpic_master_handler(vm, true, addr, width, &val) < 0) {
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if (vpic_master_handler(vm, true, addr, width, &pio_req->value) < 0) {
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pr_err("pic master read port 0x%x width=%d failed\n",
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addr, width);
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}
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return val;
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return true;
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}
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static bool vpic_master_io_write(struct acrn_vm *vm, uint16_t addr, size_t width,
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@@ -773,15 +774,15 @@ static int32_t vpic_slave_handler(struct acrn_vm *vm, bool in, uint16_t port,
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return ret;
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}
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static uint32_t vpic_slave_io_read(struct acrn_vm *vm, uint16_t addr, size_t width)
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static bool vpic_slave_io_read(struct acrn_vm *vm, struct acrn_vcpu *vcpu, uint16_t addr, size_t width)
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{
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uint32_t val = 0U;
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struct pio_request *pio_req = &vcpu->req.reqs.pio;
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if (vpic_slave_handler(vm, true, addr, width, &val) < 0) {
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if (vpic_slave_handler(vm, true, addr, width, &pio_req->value) < 0) {
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pr_err("pic slave read port 0x%x width=%d failed\n",
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addr, width);
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}
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return val;
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return true;
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}
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static bool vpic_slave_io_write(struct acrn_vm *vm, uint16_t addr, size_t width,
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@@ -843,14 +844,15 @@ static int32_t vpic_elc_handler(struct acrn_vm *vm, bool in, uint16_t port, size
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return ret;
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}
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static uint32_t vpic_elc_io_read(struct acrn_vm *vm, uint16_t addr, size_t width)
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static bool vpic_elc_io_read(struct acrn_vm *vm, struct acrn_vcpu *vcpu, uint16_t addr, size_t width)
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{
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uint32_t val = 0U;
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struct pio_request *pio_req = &vcpu->req.reqs.pio;
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if (vpic_elc_handler(vm, true, addr, width, &val) < 0) {
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if (vpic_elc_handler(vm, true, addr, width, &pio_req->value) < 0) {
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pr_err("pic elc read port 0x%x width=%d failed", addr, width);
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}
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return val;
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return true;
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}
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static bool vpic_elc_io_write(struct acrn_vm *vm, uint16_t addr, size_t width,
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@@ -43,19 +43,20 @@ static uint8_t cmos_get_reg_val(uint8_t addr)
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return reg;
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}
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static uint32_t vrtc_read(struct acrn_vm *vm, uint16_t addr, __unused size_t width)
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static bool vrtc_read(struct acrn_vm *vm, struct acrn_vcpu *vcpu, uint16_t addr, __unused size_t width)
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{
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uint8_t reg;
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uint8_t offset;
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struct pio_request *pio_req = &vcpu->req.reqs.pio;
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offset = vm->vrtc_offset;
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if (addr == CMOS_ADDR_PORT) {
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return vm->vrtc_offset;
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pio_req->value = vm->vrtc_offset;
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} else {
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pio_req->value = cmos_get_reg_val(offset);
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}
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reg = cmos_get_reg_val(offset);
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return reg;
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return true;
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}
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static bool vrtc_write(struct acrn_vm *vm, uint16_t addr, size_t width,
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