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hv: cleanup vmcs.h
-- move 'RFLAGS_AC' to cpu.h -- move 'VMX_SUPPORT_UNRESTRICTED_GUEST' to msr.h and rename it to 'MSR_IA32_MISC_UNRESTRICTED_GUEST' -- move 'get_vcpu_mode' to vcpu.h -- remove deadcode 'vmx_eoi_exit()' Tracked-On: #1842 Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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@ -323,8 +323,7 @@ static inline bool is_vmx_disabled(void)
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static inline bool pcpu_has_vmx_unrestricted_guest_cap(void)
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{
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return ((msr_read(MSR_IA32_VMX_MISC) & VMX_SUPPORT_UNRESTRICTED_GUEST)
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!= 0UL);
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return ((msr_read(MSR_IA32_VMX_MISC) & MSR_IA32_MISC_UNRESTRICTED_GUEST) != 0UL);
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}
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static int32_t check_vmx_mmu_cap(void)
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@ -6,6 +6,7 @@
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#include <types.h>
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#include <errno.h>
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#include <vmx.h>
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#include <guest_memory.h>
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#include <vcpu.h>
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#include <vm.h>
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@ -11,7 +11,6 @@
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#include <cpuid.h>
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#include <vcpu.h>
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#include <vm.h>
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#include <vmcs.h>
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#include <vmx.h>
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#include <sgx.h>
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#include <guest_pm.h>
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@ -5,7 +5,7 @@
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*/
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#include <vm.h>
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#include <vmcs.h>
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#include <vmx.h>
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#include <schedule.h>
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#include <version.h>
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#include <reloc.h>
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@ -127,6 +127,10 @@
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/*Bits in EFER special registers */
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#define EFER_LMA 0x00000400U /* Long mode active (R) */
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#define RFLAGS_C (1U<<0U)
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#define RFLAGS_Z (1U<<6U)
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#define RFLAGS_AC (1U<<18U)
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/* CPU clock frequencies (FSB) */
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#define CPU_FSB_83KHZ 83200
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#define CPU_FSB_100KHZ 99840
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@ -378,6 +378,11 @@ static inline bool is_vcpu_bsp(const struct acrn_vcpu *vcpu)
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return (vcpu->vcpu_id == BOOT_CPU_ID);
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}
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static inline enum vm_cpu_mode get_vcpu_mode(const struct acrn_vcpu *vcpu)
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{
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return vcpu->arch.cpu_mode;
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}
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/* do not update Guest RIP for next VM Enter */
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static inline void vcpu_retain_rip(struct acrn_vcpu *vcpu)
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{
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@ -12,7 +12,6 @@
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#ifndef ASSEMBLER
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#include <types.h>
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#include <vmx.h>
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#include <vcpu.h>
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#define VMX_VMENTRY_FAIL 0x80000000U
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@ -22,11 +21,6 @@
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#define TYPE_LINEAR_APIC_INST_READ (0UL << 12U)
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#define TYPE_LINEAR_APIC_INST_WRITE (1UL << 12U)
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static inline uint32_t vmx_eoi_exit(uint32_t vector)
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{
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return (VMX_EOI_EXIT0_FULL + ((vector >> 6U) * 2U));
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}
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/* VM exit qulifications for APIC-access
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* Access type:
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* 0 = linear access for a data read during instruction execution
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@ -46,22 +40,9 @@ static inline uint64_t apic_access_offset(uint64_t qual)
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{
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return (qual & APIC_ACCESS_OFFSET);
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}
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#define RFLAGS_C (1U<<0U)
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#define RFLAGS_Z (1U<<6U)
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#define RFLAGS_AC (1U<<18U)
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#define VMX_SUPPORT_UNRESTRICTED_GUEST (1U<<5U)
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void init_vmcs(struct acrn_vcpu *vcpu);
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void switch_apicv_mode_x2apic(struct acrn_vcpu *vcpu);
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static inline enum vm_cpu_mode get_vcpu_mode(const struct acrn_vcpu *vcpu)
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{
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return vcpu->arch.cpu_mode;
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}
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#endif /* ASSEMBLER */
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#endif /* VMCS_H_ */
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@ -563,6 +563,9 @@
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#define MSR_IA32_MISC_ENABLE_xTPR (1UL << 23U)
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#define MSR_IA32_MISC_ENABLE_XD_DISABLE (1UL << 34U)
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/* Miscellaneous data */
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#define MSR_IA32_MISC_UNRESTRICTED_GUEST (1U<<5U)
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#ifndef ASSEMBLER
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static inline bool pat_mem_type_invalid(uint64_t x)
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{
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