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hv: initialize BARs of ivshmem device
ivshmem device supports two BARs, BAR 0 is used for inter-VM notification mechanism, BAR 2 is used to provide shared memory base address and size. v4: check if the return value of get_shm_region function is NULL v5: 1) change get_shm_region to find_shm_region 2) add print log when ivshmem device doesn't find memory region Tracked-On: #4853 Signed-off-by: Yuan Liu <yuan1.liu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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@@ -10,6 +10,7 @@
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#include <ept.h>
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#include <logmsg.h>
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#include <ivshmem.h>
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#include <ivshmem_cfg.h>
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#include "vpci_priv.h"
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/* config space of ivshmem device */
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@@ -18,6 +19,10 @@
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#define IVSHMEM_CLASS 0x05U
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#define IVSHMEM_REV 0x01U
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/* ivshmem device only supports bar0 and bar2 */
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#define IVSHMEM_MMIO_BAR 0U
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#define IVSHMEM_SHM_BAR 2U
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/* IVSHMEM_SHM_SIZE is provided by offline tool */
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static uint8_t ivshmem_base[IVSHMEM_SHM_SIZE] __aligned(PDE_SIZE);
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@@ -32,6 +37,21 @@ void init_ivshmem_shared_memory()
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}
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}
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/*
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* @pre name != NULL
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*/
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static struct ivshmem_shm_region *find_shm_region(const char *name)
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{
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uint32_t i, num = ARRAY_SIZE(mem_regions);
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for (i = 0U; i < num; i++) {
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if (strncmp(name, mem_regions[i].name, sizeof(mem_regions[0].name)) == 0) {
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break;
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}
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}
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return ((i < num) ? &mem_regions[i] : NULL);
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}
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static int32_t read_ivshmem_vdev_cfg(const struct pci_vdev *vdev, uint32_t offset, uint32_t bytes, uint32_t *val)
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{
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/* Implementation in next patch */
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@@ -51,6 +71,47 @@ static int32_t write_ivshmem_vdev_cfg(struct pci_vdev *vdev, uint32_t offset, ui
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(void) val;
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return 0;
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}
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/*
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* @pre vdev != NULL
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* @pre bar_idx < PCI_BAR_COUNT
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*/
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static void init_ivshmem_bar(struct pci_vdev *vdev, uint32_t bar_idx)
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{
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struct pci_vbar *vbar;
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enum pci_bar_type type;
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uint64_t addr, mask, size = 0UL;
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struct acrn_vm_pci_dev_config *dev_config = vdev->pci_dev_config;
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addr = dev_config->vbar_base[bar_idx];
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type = pci_get_bar_type((uint32_t) addr);
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mask = (type == PCIBAR_IO_SPACE) ? PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK;
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vbar = &vdev->vbars[bar_idx];
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vbar->type = type;
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if (bar_idx == IVSHMEM_SHM_BAR) {
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struct ivshmem_shm_region *region = find_shm_region(dev_config->shm_region_name);
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if (region != NULL) {
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size = region->size;
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vbar->base_hpa = region->hpa;
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} else {
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pr_err("%s ivshmem device %x:%x.%x has no memory region\n",
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__func__, vdev->bdf.bits.b, vdev->bdf.bits.d, vdev->bdf.bits.f);
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}
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} else if (bar_idx == IVSHMEM_MMIO_BAR) {
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size = 0x100UL;
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}
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if (size != 0UL) {
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vbar->size = size;
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vbar->mask = (uint32_t) (~(size - 1UL));
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vbar->fixed = (uint32_t) (addr & (~mask));
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pci_vdev_write_vbar(vdev, bar_idx, (uint32_t) addr);
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if (type == PCIBAR_MEM64) {
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vbar = &vdev->vbars[bar_idx + 1U];
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vbar->type = PCIBAR_MEM64HI;
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vbar->mask = (uint32_t) ((~(size - 1UL)) >> 32U);
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pci_vdev_write_vbar(vdev, (bar_idx + 1U), ((uint32_t)(addr >> 32U)));
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}
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}
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}
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static void init_ivshmem_vdev(struct pci_vdev *vdev)
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{
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@@ -60,6 +121,11 @@ static void init_ivshmem_vdev(struct pci_vdev *vdev)
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pci_vdev_write_vcfg(vdev, PCIR_REVID, 1U, IVSHMEM_REV);
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pci_vdev_write_vcfg(vdev, PCIR_CLASS, 1U, IVSHMEM_CLASS);
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/* initialize ivshmem bars */
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vdev->nr_bars = PCI_BAR_COUNT;
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init_ivshmem_bar(vdev, IVSHMEM_MMIO_BAR);
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init_ivshmem_bar(vdev, IVSHMEM_SHM_BAR);
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vdev->user = vdev;
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}
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