github/acrn-hypervisor
1
0
Fork 0
mirror of https://github.com/projectacrn/acrn-hypervisor.git synced 2025-09-22 17:27:53 +00:00
Code Issues Projects Releases Wiki Activity

hv: add check for BASIC VMX INFORMATION

Browse Source 
Check bit 48 in IA32_VMX_BASIC MSR, if it is 1, return error, as we only
support Intel 64 architecture.

SDM:
Appendix A.1 BASIC VMX INFORMATION

Bit 48 indicates the width of the physical addresses that may be used for the
VMXON region, each VMCS, anddata structures referenced by pointers in a
VMCS (I/O bitmaps, virtual-APIC page, MSR areas for VMX transitions). If
the bit is 0, these addresses are limited to the processor’s
physical-address width.2 If the bit is 1, these addresses are limited to
32 bits. This bit is always 0 for processors that support Intel 64
architecture.

Tracked-On: #4956
Signed-off-by: Conghui Chen <conghui.chen@intel.com>
This commit is contained in:
Conghui Chen
2020-06-17 19:06:49 +00:00
committed by wenlingz
parent 906284eec8
commit 2a4c59db74
2 changed files with 11 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
hypervisor/include/arch/x86/msr.h
View File

@@ -571,6 +571,9 @@
/* Miscellaneous data */
#define MSR_IA32_MISC_UNRESTRICTED_GUEST (1U<<5U)
/* Width of physical address used by VMX related region */
#define MSR_IA32_VMX_BASIC_ADDR_WIDTH (1UL << 48U)
/* 5 high-order bits in every field are reserved */
#define PAT_FIELD_RSV_BITS (0xF8UL)