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hv: pSRAM: temporarily remove NX bit of PTCM binary

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Temporarily remove NX bit of PTCM binary in pagetable during pSRAM
initialization:
1.added a function ppt_set_nx_bit to temporarily remove/restore the NX bit of
a given area in pagetable.
2.Temporarily remove NX bit of PTCM binary during pSRAM initialization to make
PTCM codes executable.
3. TODO: We may use SMP call to flush TLB and do pSRAM initilization on APs.

Tracked-On: #5330
Signed-off-by: Qian Wang <qian1.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Li Fei1
2020-10-29 20:51:33 +08:00
committed by wenlingz
parent 5fa816f921
commit 35abee60d6
3 changed files with 50 additions and 0 deletions
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6
hypervisor/include/arch/x86/mmu.h
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@@ -114,6 +114,7 @@ void mmu_add(uint64_t *pml4_page, uint64_t paddr_base, uint64_t vaddr_base,
void mmu_modify_or_del(uint64_t *pml4_page, uint64_t vaddr_base, uint64_t size,
uint64_t prot_set, uint64_t prot_clr, const struct memory_ops *mem_ops, uint32_t type);
void hv_access_memory_region_update(uint64_t base, uint64_t size);
void ppt_set_nx_bit(uint64_t base, uint64_t size, bool add);
/**
* @brief Specified signle VPID flush
@@ -150,6 +151,11 @@ void flush_address_space(void *addr, uint64_t size);
*/
void invept(const void *eptp);
static inline void invlpg(unsigned long addr)
{
asm volatile("invlpg (%0)" ::"r" (addr) : "memory");
}
static inline void cache_flush_invalidate_all(void)
{
asm volatile (" wbinvd\n" : : : "memory");