hv: pSRAM: add PTCT parsing code

The added parse_ptct function will parse native ACPI PTCT table to
acquire information like pSRAM location/size/level and PTCM location,
and save them.

Tracked-On: #5330
Signed-off-by: Qian Wang <qian1.wang@intel.com>

hypervisor/acpi_parser/acpi_ext.c

@@ -35,6 +35,7 @@
 #include <host_pm.h>
 #include <pci.h>
 #include <acrn_common.h>
+#include <ptcm.h>
 
 /* Per ACPI spec:
  * There are two fundamental types of ACPI tables:
@@ -129,7 +130,7 @@ static struct acpi_mcfg_allocation *parse_mcfg_allocation_tables(const uint8_t *
 /* put all ACPI fix up code here */
 int32_t acpi_fixup(void)
 {
-	uint8_t *facp_addr = NULL, *facs_addr = NULL, *mcfg_addr = NULL;
+	uint8_t *facp_addr = NULL, *facs_addr = NULL, *mcfg_addr = NULL, *ptct_tbl_addr = NULL;
 	struct acpi_mcfg_allocation *mcfg_table = NULL;
 	int32_t ret = 0;
 	struct acpi_generic_address pm1a_cnt, pm1a_evt;
@@ -168,6 +169,11 @@ int32_t acpi_fixup(void)
 		}
 	}
 
+	ptct_tbl_addr = (uint8_t *)get_acpi_tbl(ACPI_SIG_PTCT);
+	if (ptct_tbl_addr != NULL) {
+		set_ptct_tbl((void *)ptct_tbl_addr);
+	}
+
 	if ((facp_addr == NULL) || (facs_addr == NULL)
 				|| (mcfg_addr == NULL) || (mcfg_table == NULL)) {
 		ret = -1;

hypervisor/arch/x86/ptcm.c

@@ -11,6 +11,9 @@
 #include <ptcm.h>
 
 
+uint64_t psram_area_bottom;
+uint64_t psram_area_top;
+
 /* is_psram_initialized is used to tell whether psram is successfully initialized for all cores */
 volatile bool is_psram_initialized = false;
 
@@ -25,9 +28,51 @@ static inline void *get_ptct_address()
 	return (void *)acpi_ptct_tbl + sizeof(*acpi_ptct_tbl);
 }
 
+void set_ptct_tbl(void *ptct_tbl_addr)
+{
+	acpi_ptct_tbl = ptct_tbl_addr;
+}
+
 static void parse_ptct(void)
 {
-	/* TODO: Will add in the next patch */
+	struct ptct_entry *entry;
+	struct ptct_entry_data_psram *psram_entry;
+
+	if (acpi_ptct_tbl != NULL) {
+		pr_info("found PTCT subtable in HPA %llx, length: %d", acpi_ptct_tbl, acpi_ptct_tbl->length);
+
+		entry = get_ptct_address();
+		psram_area_bottom = PSRAM_BASE_HPA;
+
+		while (((uint64_t)entry - (uint64_t)acpi_ptct_tbl) < acpi_ptct_tbl->length) {
+			switch (entry->type) {
+			case PTCT_ENTRY_TYPE_PTCM_BINARY:
+				ptcm_binary = (struct ptct_entry_data_ptcm_binary *)entry->data;
+				if (psram_area_top < ptcm_binary->address + ptcm_binary->size) {
+					psram_area_top = ptcm_binary->address + ptcm_binary->size;
+				}
+				pr_info("found PTCM bin, in HPA %llx, size %llx", ptcm_binary->address, ptcm_binary->size);
+				break;
+
+			case PTCT_ENTRY_TYPE_PSRAM:
+				psram_entry = (struct ptct_entry_data_psram *)entry->data;
+				if (psram_area_top < psram_entry->base + psram_entry->size) {
+					psram_area_top = psram_entry->base + psram_entry->size;
+				}
+				pr_info("found L%d psram, at HPA %llx, size %x", psram_entry->cache_level,
+					psram_entry->base, psram_entry->size);
+				break;
+			/* In current phase, we ignore other entries like gt_clos and wrc_close */
+			default:
+				break;
+			}
+			/* point to next ptct entry */
+			entry = (struct ptct_entry *)((uint64_t)entry + entry->size);
+		}
+		psram_area_top = round_page_up(psram_area_top);
+	} else {
+		pr_fatal("Cannot find PTCT pointer!!!!");
+	}
 }
 
 /*
@@ -83,6 +128,10 @@ void init_psram(bool is_bsp)
 	}
 }
 #else
+void set_ptct_tbl(__unused void *ptct_tbl_addr)
+{
+}
+
 void init_psram(__unused bool is_bsp)
 {
 }

hypervisor/boot/include/acpi.h

@@ -57,6 +57,7 @@
 #define ACPI_SIG_MCFG            "MCFG" /* Memory Mapped Configuration table */
 #define ACPI_SIG_DSDT            "DSDT" /* Differentiated System Description Table */
 #define ACPI_SIG_TPM2            "TPM2" /* Trusted Platform Module hardware interface table */
+#define ACPI_SIG_PTCT            "PTCT" /* Platform Tuning Configuration Table (Real-Time Configuration Table) */
 
 struct packed_gas {
 	uint8_t 	space_id;

hypervisor/include/arch/x86/ptcm.h

@@ -28,4 +28,5 @@ struct ptcm_header {
 
 extern volatile bool is_psram_initialized;
 void init_psram(bool is_bsp);
+void set_ptct_tbl(void *ptct_tbl_addr);
 #endif /* PTCM_H */

hypervisor/include/arch/x86/ptct.h

@@ -10,11 +10,44 @@
 #include <acpi.h>
 
 
+#define PTCT_ENTRY_TYPE_PTCD_LIMIT		1U
+#define PTCT_ENTRY_TYPE_PTCM_BINARY		2U
+#define PTCT_ENTRY_TYPE_WRC_L3_MASKS		3U
+#define PTCT_ENTRY_TYPE_GT_L3_MASKS		4U
+#define PTCT_ENTRY_TYPE_PSRAM			5U
+#define PTCT_ENTRY_TYPE_STREAM_DATAPATH		6U
+#define PTCT_ENTRY_TYPE_TIMEAWARE_SUBSYS	7U
+#define PTCT_ENTRY_TYPE_RT_IOMMU		8U
+#define PTCT_ENTRY_TYPE_MEM_HIERARCHY_LATENCY	9U
+
+#define PSRAM_BASE_HPA 0x40080000U
+#define PSRAM_BASE_GPA 0x40080000U
+#define PSRAM_MAX_SIZE 0x00800000U
+
+struct ptct_entry{
+	 uint16_t size;
+	 uint16_t format;
+	 uint32_t type;
+	 uint32_t data[64];
+} __packed;
+
 struct ptct_entry_data_ptcm_binary
 {
 	uint64_t address;
 	uint32_t size;
 } __packed;
 
+struct ptct_entry_data_psram
+{
+	uint32_t cache_level;
+	uint64_t base;
+	uint32_t ways;
+	uint32_t size;
+	uint32_t apic_id_0; /*only the first core is responsible for initialization of L3 mem region*/
+} __packed;
+
+
+extern uint64_t psram_area_bottom;
+extern uint64_t psram_area_top;
 
 #endif /* PTCT_H */