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doc: reference code update for cpu sharing

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The VM configuration struct initialization method is slightly changed
recently, so reference code for cpu shaing need to be changed
accordingly.

Signed-off-by: Victor Sun <victor.sun@intel.com>
This commit is contained in:
Victor Sun 2020-04-30 23:01:19 +08:00 committed by David Kinder
parent 515e478282
commit 3f5bfe5511
1 changed files with 10 additions and 23 deletions
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33
doc/tutorials/cpu_sharing.rst
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@ -142,9 +142,9 @@ Change the following three files:
"i915.enable_gvt=1 " \
SOS_BOOTARGS_DIFF
#define VM1_CONFIG_VCPU_AFFINITY {AFFINITY_CPU(0U)}
#define VM2_CONFIG_VCPU_AFFINITY {AFFINITY_CPU(1U), AFFINITY_CPU(2U)}
#define VM3_CONFIG_VCPU_AFFINITY {AFFINITY_CPU(3U)}
#define VM1_CONFIG_CPU_AFFINITY {AFFINITY_CPU(0U)}
#define VM2_CONFIG_CPU_AFFINITY {AFFINITY_CPU(1U), AFFINITY_CPU(2U)}
#define VM3_CONFIG_CPU_AFFINITY {AFFINITY_CPU(3U)}
3. ``hypervisor/scenarios/industry/vm_configurations.c``
@ -152,10 +152,8 @@ Change the following three files:
struct acrn_vm_config vm_configs[CONFIG_MAX_VM_NUM] = {
{
.load_order = SOS_VM,
CONFIG_SOS_VM,
.name = "ACRN SOS VM",
.uuid = {0xdbU, 0xbbU, 0xd4U, 0x34U, 0x7aU, 0x57U, 0x42U, 0x16U, \
0xa1U, 0x2cU, 0x22U, 0x01U, 0xf1U, 0xabU, 0x02U, 0x40U},
.guest_flags = 0UL,
.clos = 0U,
.memory = {
@ -184,11 +182,8 @@ Change the following three files:
.pci_devs = sos_pci_devs,
},
{
.load_order = POST_LAUNCHED_VM,
.uuid = {0xd2U, 0x79U, 0x54U, 0x38U, 0x25U, 0xd6U, 0x11U, 0xe8U, \
0x86U, 0x4eU, 0xcbU, 0x7aU, 0x18U, 0xb3U, 0x46U, 0x43U},
.vcpu_num = 1U,
.vcpu_affinity = VM1_CONFIG_VCPU_AFFINITY,
CONFIG_POST_STD_VM(1),
.cpu_affinity_bitmap = VM1_CONFIG_CPU_AFFINITY,
.vuart[0] = {
.type = VUART_LEGACY_PIO,
.addr.port_base = COM1_BASE,
@ -201,13 +196,8 @@ Change the following three files:
},
{
.load_order = POST_LAUNCHED_VM,
.uuid = {0x49U, 0x5aU, 0xe2U, 0xe5U, 0x26U, 0x03U, 0x4dU, 0x64U, \
0xafU, 0x76U, 0xd4U, 0xbcU, 0x5aU, 0x8eU, 0xc0U, 0xe5U},
.guest_flags = GUEST_FLAG_HIGHEST_SEVERITY,
.vcpu_num = 2U,
.vcpu_affinity = VM2_CONFIG_VCPU_AFFINITY,
CONFIG_POST_RT_VM(1),
.cpu_affinity_bitmap = VM2_CONFIG_CPU_AFFINITY,
.vuart[0] = {
.type = VUART_LEGACY_PIO,
.addr.port_base = COM1_BASE,
@ -222,11 +212,8 @@ Change the following three files:
},
},
{
.load_order = POST_LAUNCHED_VM,
.uuid = {0x38U, 0x15U, 0x88U, 0x21U, 0x52U, 0x08U, 0x40U, 0x05U, \
0xb7U, 0x2aU, 0x8aU, 0x60U, 0x9eU, 0x41U, 0x90U, 0xd0U},
.vcpu_num = 1U,
.vcpu_affinity = VM3_CONFIG_VCPU_AFFINITY,
CONFIG_POST_STD_VM(2),
.cpu_affinity_bitmap = VM3_CONFIG_CPU_AFFINITY,
.vuart[0] = {
.type = VUART_LEGACY_PIO,
.addr.port_base = COM1_BASE,