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hv: riscv: add check for other memory mode

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Check whether SV48 is supported, panic if not.

Tracked-On: #8831
Signed-off-by: hangliu1 <hang1.liu@intel.com>
Reviewed-by: Liu, Yifan1 <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
This commit is contained in:
hangliu1
2025-10-15 15:55:05 +08:00
committed by acrnsi-robot
parent a6e0cba89b
commit 47ed22bef8
2 changed files with 22 additions and 5 deletions
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2
hypervisor/include/arch/riscv/asm/mmu.h
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@@ -10,7 +10,7 @@
#include <asm/page.h>
#include <asm/pgtable.h>
static inline void switch_satp(uint64_t satp)
static inline void set_satp(uint64_t satp)
{
asm volatile (
"csrw satp, %0\n\t" \